NUC472_NUC442_BSP V3.03.005
The Board Support Package for NUC472/NUC442
Modules | Data Structures | Macros | Typedefs | Enumerations
NUC472/NUC442 Device CMSIS Definitions
Collaboration diagram for NUC472/NUC442 Device CMSIS Definitions:

Modules

 NUC472/NUC442 Control Register
 

Data Structures

struct  ADC_T
 

Macros

#define __CM4_REV   0x0201
 
#define __NVIC_PRIO_BITS   4
 
#define __Vendor_SysTickConfig   0
 
#define __MPU_PRESENT   1
 
#define __FPU_PRESENT   1
 

Typedefs

typedef enum IRQn IRQn_Type
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14 ,
  MemoryManagement_IRQn = -12 ,
  BusFault_IRQn = -11 ,
  UsageFault_IRQn = -10 ,
  SVCall_IRQn = -5 ,
  DebugMonitor_IRQn = -4 ,
  PendSV_IRQn = -2 ,
  SysTick_IRQn = -1 ,
  BOD_IRQn = 0 ,
  IRC_IRQn = 1 ,
  PWRWU_IRQn = 2 ,
  SRAMF_IRQn = 3 ,
  CLKF_IRQn = 4 ,
  RTC_IRQn = 6 ,
  TAMPER_IRQn = 7 ,
  EINT0_IRQn = 8 ,
  EINT1_IRQn = 9 ,
  EINT2_IRQn = 10 ,
  EINT3_IRQn = 11 ,
  EINT4_IRQn = 12 ,
  EINT5_IRQn = 13 ,
  EINT6_IRQn = 14 ,
  EINT7_IRQn = 15 ,
  GPA_IRQn = 16 ,
  GPB_IRQn = 17 ,
  GPC_IRQn = 18 ,
  GPD_IRQn = 19 ,
  GPE_IRQn = 20 ,
  GPF_IRQn = 21 ,
  GPG_IRQn = 22 ,
  GPH_IRQn = 23 ,
  GPI_IRQn = 24 ,
  TMR0_IRQn = 32 ,
  TMR1_IRQn = 33 ,
  TMR2_IRQn = 34 ,
  TMR3_IRQn = 35 ,
  PDMA_IRQn = 40 ,
  ADC_IRQn = 42 ,
  WDT_IRQn = 46 ,
  WWDT_IRQn = 47 ,
  EADC0_IRQn = 48 ,
  EADC1_IRQn = 49 ,
  EADC2_IRQn = 50 ,
  EADC3_IRQn = 51 ,
  ACMP_IRQn = 56 ,
  OPA0_IRQn = 60 ,
  OPA1_IRQn = 61 ,
  ICAP0_IRQn = 62 ,
  ICAP1_IRQn = 63 ,
  PWM0CH0_IRQn = 64 ,
  PWM0CH1_IRQn = 65 ,
  PWM0CH2_IRQn = 66 ,
  PWM0CH3_IRQn = 67 ,
  PWM0CH4_IRQn = 68 ,
  PWM0CH5_IRQn = 69 ,
  PWM0_BRK_IRQn = 70 ,
  QEI0_IRQn = 71 ,
  PWM1CH0_IRQn = 72 ,
  PWM1CH1_IRQn = 73 ,
  PWM1CH2_IRQn = 74 ,
  PWM1CH3_IRQn = 75 ,
  PWM1CH4_IRQn = 76 ,
  PWM1CH5_IRQn = 77 ,
  PWM1BRK_IRQn = 78 ,
  QEI1_IRQn = 79 ,
  EPWM0_IRQn = 80 ,
  EPWM0BRK_IRQn = 81 ,
  EPWM1_IRQn = 82 ,
  EPWM1BRK_IRQn = 83 ,
  USBD_IRQn = 88 ,
  USBH_IRQn = 89 ,
  USB_OTG_IRQn = 90 ,
  EMAC_TX_IRQn = 92 ,
  EMAC_RX_IRQn = 93 ,
  SPI0_IRQn = 96 ,
  SPI1_IRQn = 97 ,
  SPI2_IRQn = 98 ,
  SPI3_IRQn = 99 ,
  UART0_IRQn = 104 ,
  UART1_IRQn = 105 ,
  UART2_IRQn = 106 ,
  UART3_IRQn = 107 ,
  UART4_IRQn = 108 ,
  UART5_IRQn = 109 ,
  I2C0_IRQn = 112 ,
  I2C1_IRQn = 113 ,
  I2C2_IRQn = 114 ,
  I2C3_IRQn = 115 ,
  I2C4_IRQn = 116 ,
  SC0_IRQn = 120 ,
  SC1_IRQn = 121 ,
  SC2_IRQn = 122 ,
  SC3_IRQn = 123 ,
  SC4_IRQn = 124 ,
  SC5_IRQn = 125 ,
  CAN0_IRQn = 128 ,
  CAN1_IRQn = 129 ,
  I2S0_IRQn = 132 ,
  I2S1_IRQn = 133 ,
  SD_IRQn = 136 ,
  PS2D_IRQn = 138 ,
  CAP_IRQn = 139 ,
  CRPT_IRQn = 140 ,
  CRC_IRQn = 141
}
 
#define ADC_DAT0_RESULT_Pos   (0)
 
#define ADC_DAT0_RESULT_Msk   (0xfffful << ADC_DAT0_RESULT_Pos)
 
#define ADC_DAT0_OV_Pos   (16)
 
#define ADC_DAT0_OV_Msk   (0x1ul << ADC_DAT0_OV_Pos)
 
#define ADC_DAT0_VALID_Pos   (17)
 
#define ADC_DAT0_VALID_Msk   (0x1ul << ADC_DAT0_VALID_Pos)
 
#define ADC_DAT1_RESULT_Pos   (0)
 
#define ADC_DAT1_RESULT_Msk   (0xfffful << ADC_DAT1_RESULT_Pos)
 
#define ADC_DAT1_OV_Pos   (16)
 
#define ADC_DAT1_OV_Msk   (0x1ul << ADC_DAT1_OV_Pos)
 
#define ADC_DAT1_VALID_Pos   (17)
 
#define ADC_DAT1_VALID_Msk   (0x1ul << ADC_DAT1_VALID_Pos)
 
#define ADC_DAT2_RESULT_Pos   (0)
 
#define ADC_DAT2_RESULT_Msk   (0xfffful << ADC_DAT2_RESULT_Pos)
 
#define ADC_DAT2_OV_Pos   (16)
 
#define ADC_DAT2_OV_Msk   (0x1ul << ADC_DAT2_OV_Pos)
 
#define ADC_DAT2_VALID_Pos   (17)
 
#define ADC_DAT2_VALID_Msk   (0x1ul << ADC_DAT2_VALID_Pos)
 
#define ADC_DAT3_RESULT_Pos   (0)
 
#define ADC_DAT3_RESULT_Msk   (0xfffful << ADC_DAT3_RESULT_Pos)
 
#define ADC_DAT3_OV_Pos   (16)
 
#define ADC_DAT3_OV_Msk   (0x1ul << ADC_DAT3_OV_Pos)
 
#define ADC_DAT3_VALID_Pos   (17)
 
#define ADC_DAT3_VALID_Msk   (0x1ul << ADC_DAT3_VALID_Pos)
 
#define ADC_DAT4_RESULT_Pos   (0)
 
#define ADC_DAT4_RESULT_Msk   (0xfffful << ADC_DAT4_RESULT_Pos)
 
#define ADC_DAT4_OV_Pos   (16)
 
#define ADC_DAT4_OV_Msk   (0x1ul << ADC_DAT4_OV_Pos)
 
#define ADC_DAT4_VALID_Pos   (17)
 
#define ADC_DAT4_VALID_Msk   (0x1ul << ADC_DAT4_VALID_Pos)
 
#define ADC_DAT5_RESULT_Pos   (0)
 
#define ADC_DAT5_RESULT_Msk   (0xfffful << ADC_DAT5_RESULT_Pos)
 
#define ADC_DAT5_OV_Pos   (16)
 
#define ADC_DAT5_OV_Msk   (0x1ul << ADC_DAT5_OV_Pos)
 
#define ADC_DAT5_VALID_Pos   (17)
 
#define ADC_DAT5_VALID_Msk   (0x1ul << ADC_DAT5_VALID_Pos)
 
#define ADC_DAT6_RESULT_Pos   (0)
 
#define ADC_DAT6_RESULT_Msk   (0xfffful << ADC_DAT6_RESULT_Pos)
 
#define ADC_DAT6_OV_Pos   (16)
 
#define ADC_DAT6_OV_Msk   (0x1ul << ADC_DAT6_OV_Pos)
 
#define ADC_DAT6_VALID_Pos   (17)
 
#define ADC_DAT6_VALID_Msk   (0x1ul << ADC_DAT6_VALID_Pos)
 
#define ADC_DAT7_RESULT_Pos   (0)
 
#define ADC_DAT7_RESULT_Msk   (0xfffful << ADC_DAT7_RESULT_Pos)
 
#define ADC_DAT7_OV_Pos   (16)
 
#define ADC_DAT7_OV_Msk   (0x1ul << ADC_DAT7_OV_Pos)
 
#define ADC_DAT7_VALID_Pos   (17)
 
#define ADC_DAT7_VALID_Msk   (0x1ul << ADC_DAT7_VALID_Pos)
 
#define ADC_DAT8_RESULT_Pos   (0)
 
#define ADC_DAT8_RESULT_Msk   (0xfffful << ADC_DAT8_RESULT_Pos)
 
#define ADC_DAT8_OV_Pos   (16)
 
#define ADC_DAT8_OV_Msk   (0x1ul << ADC_DAT8_OV_Pos)
 
#define ADC_DAT8_VALID_Pos   (17)
 
#define ADC_DAT8_VALID_Msk   (0x1ul << ADC_DAT8_VALID_Pos)
 
#define ADC_DAT9_RESULT_Pos   (0)
 
#define ADC_DAT9_RESULT_Msk   (0xfffful << ADC_DAT9_RESULT_Pos)
 
#define ADC_DAT9_OV_Pos   (16)
 
#define ADC_DAT9_OV_Msk   (0x1ul << ADC_DAT9_OV_Pos)
 
#define ADC_DAT9_VALID_Pos   (17)
 
#define ADC_DAT9_VALID_Msk   (0x1ul << ADC_DAT9_VALID_Pos)
 
#define ADC_DAT10_RESULT_Pos   (0)
 
#define ADC_DAT10_RESULT_Msk   (0xfffful << ADC_DAT10_RESULT_Pos)
 
#define ADC_DAT10_OV_Pos   (16)
 
#define ADC_DAT10_OV_Msk   (0x1ul << ADC_DAT10_OV_Pos)
 
#define ADC_DAT10_VALID_Pos   (17)
 
#define ADC_DAT10_VALID_Msk   (0x1ul << ADC_DAT10_VALID_Pos)
 
#define ADC_DAT11_RESULT_Pos   (0)
 
#define ADC_DAT11_RESULT_Msk   (0xfffful << ADC_DAT11_RESULT_Pos)
 
#define ADC_DAT11_OV_Pos   (16)
 
#define ADC_DAT11_OV_Msk   (0x1ul << ADC_DAT11_OV_Pos)
 
#define ADC_DAT11_VALID_Pos   (17)
 
#define ADC_DAT11_VALID_Msk   (0x1ul << ADC_DAT11_VALID_Pos)
 
#define ADC_DAT12_RESULT_Pos   (0)
 
#define ADC_DAT12_RESULT_Msk   (0xfffful << ADC_DAT12_RESULT_Pos)
 
#define ADC_DAT12_OV_Pos   (16)
 
#define ADC_DAT12_OV_Msk   (0x1ul << ADC_DAT12_OV_Pos)
 
#define ADC_DAT12_VALID_Pos   (17)
 
#define ADC_DAT12_VALID_Msk   (0x1ul << ADC_DAT12_VALID_Pos)
 
#define ADC_DAT13_RESULT_Pos   (0)
 
#define ADC_DAT13_RESULT_Msk   (0xfffful << ADC_DAT13_RESULT_Pos)
 
#define ADC_DAT13_OV_Pos   (16)
 
#define ADC_DAT13_OV_Msk   (0x1ul << ADC_DAT13_OV_Pos)
 
#define ADC_DAT13_VALID_Pos   (17)
 
#define ADC_DAT13_VALID_Msk   (0x1ul << ADC_DAT13_VALID_Pos)
 
#define ADC_CTL_ADCEN_Pos   (0)
 
#define ADC_CTL_ADCEN_Msk   (0x1ul << ADC_CTL_ADCEN_Pos)
 
#define ADC_CTL_ADCIEN_Pos   (1)
 
#define ADC_CTL_ADCIEN_Msk   (0x1ul << ADC_CTL_ADCIEN_Pos)
 
#define ADC_CTL_OPMODE_Pos   (2)
 
#define ADC_CTL_OPMODE_Msk   (0x3ul << ADC_CTL_OPMODE_Pos)
 
#define ADC_CTL_HWTRGSEL_Pos   (4)
 
#define ADC_CTL_HWTRGSEL_Msk   (0x3ul << ADC_CTL_HWTRGSEL_Pos)
 
#define ADC_CTL_HWTRGCOND_Pos   (6)
 
#define ADC_CTL_HWTRGCOND_Msk   (0x3ul << ADC_CTL_HWTRGCOND_Pos)
 
#define ADC_CTL_HWTRGEN_Pos   (8)
 
#define ADC_CTL_HWTRGEN_Msk   (0x1ul << ADC_CTL_HWTRGEN_Pos)
 
#define ADC_CTL_PDMAEN_Pos   (9)
 
#define ADC_CTL_PDMAEN_Msk   (0x1ul << ADC_CTL_PDMAEN_Pos)
 
#define ADC_CTL_DIFFEN_Pos   (10)
 
#define ADC_CTL_DIFFEN_Msk   (0x1ul << ADC_CTL_DIFFEN_Pos)
 
#define ADC_CTL_SWTRG_Pos   (11)
 
#define ADC_CTL_SWTRG_Msk   (0x1ul << ADC_CTL_SWTRG_Pos)
 
#define ADC_CTL_PWMTRGDLY_Pos   (16)
 
#define ADC_CTL_PWMTRGDLY_Msk   (0xfful << ADC_CTL_PWMTRGDLY_Pos)
 
#define ADC_CTL_DMOF_Pos   (31)
 
#define ADC_CTL_DMOF_Msk   (0x1ul << ADC_CTL_DMOF_Pos)
 
#define ADC_CHEN_CHEN_Pos   (0)
 
#define ADC_CHEN_CHEN_Msk   (0xffful << ADC_CHEN_CHEN_Pos)
 
#define ADC_CHEN_ADTSEN_Pos   (16)
 
#define ADC_CHEN_ADTSEN_Msk   (0x1ul << ADC_CHEN_ADTSEN_Pos)
 
#define ADC_CHEN_ADBGEN_Pos   (17)
 
#define ADC_CHEN_ADBGEN_Msk   (0x1ul << ADC_CHEN_ADBGEN_Pos)
 
#define ADC_CMP0_ADCMPEN_Pos   (0)
 
#define ADC_CMP0_ADCMPEN_Msk   (0x1ul << ADC_CMP0_ADCMPEN_Pos)
 
#define ADC_CMP0_ADCMPIE_Pos   (1)
 
#define ADC_CMP0_ADCMPIE_Msk   (0x1ul << ADC_CMP0_ADCMPIE_Pos)
 
#define ADC_CMP0_CMPCOND_Pos   (2)
 
#define ADC_CMP0_CMPCOND_Msk   (0x1ul << ADC_CMP0_CMPCOND_Pos)
 
#define ADC_CMP0_CMPCH_Pos   (3)
 
#define ADC_CMP0_CMPCH_Msk   (0xful << ADC_CMP0_CMPCH_Pos)
 
#define ADC_CMP0_CMPMCNT_Pos   (8)
 
#define ADC_CMP0_CMPMCNT_Msk   (0xful << ADC_CMP0_CMPMCNT_Pos)
 
#define ADC_CMP0_CMPDAT_Pos   (16)
 
#define ADC_CMP0_CMPDAT_Msk   (0xffful << ADC_CMP0_CMPDAT_Pos)
 
#define ADC_CMP1_ADCMPEN_Pos   (0)
 
#define ADC_CMP1_ADCMPEN_Msk   (0x1ul << ADC_CMP1_ADCMPEN_Pos)
 
#define ADC_CMP1_ADCMPIE_Pos   (1)
 
#define ADC_CMP1_ADCMPIE_Msk   (0x1ul << ADC_CMP1_ADCMPIE_Pos)
 
#define ADC_CMP1_CMPCOND_Pos   (2)
 
#define ADC_CMP1_CMPCOND_Msk   (0x1ul << ADC_CMP1_CMPCOND_Pos)
 
#define ADC_CMP1_CMPCH_Pos   (3)
 
#define ADC_CMP1_CMPCH_Msk   (0xful << ADC_CMP1_CMPCH_Pos)
 
#define ADC_CMP1_CMPMCNT_Pos   (8)
 
#define ADC_CMP1_CMPMCNT_Msk   (0xful << ADC_CMP1_CMPMCNT_Pos)
 
#define ADC_CMP1_CMPDAT_Pos   (16)
 
#define ADC_CMP1_CMPDAT_Msk   (0xffful << ADC_CMP1_CMPDAT_Pos)
 
#define ADC_STATUS0_ADIF_Pos   (0)
 
#define ADC_STATUS0_ADIF_Msk   (0x1ul << ADC_STATUS0_ADIF_Pos)
 
#define ADC_STATUS0_ADCMPF0_Pos   (1)
 
#define ADC_STATUS0_ADCMPF0_Msk   (0x1ul << ADC_STATUS0_ADCMPF0_Pos)
 
#define ADC_STATUS0_ADCMPF1_Pos   (2)
 
#define ADC_STATUS0_ADCMPF1_Msk   (0x1ul << ADC_STATUS0_ADCMPF1_Pos)
 
#define ADC_STATUS0_BUSY_Pos   (3)
 
#define ADC_STATUS0_BUSY_Msk   (0x1ul << ADC_STATUS0_BUSY_Pos)
 
#define ADC_STATUS0_CHANNEL_Pos   (4)
 
#define ADC_STATUS0_CHANNEL_Msk   (0xful << ADC_STATUS0_CHANNEL_Pos)
 
#define ADC_STATUS1_VALID_Pos   (0)
 
#define ADC_STATUS1_VALID_Msk   (0x3ffful << ADC_STATUS1_VALID_Pos)
 
#define ADC_STATUS1_OV_Pos   (16)
 
#define ADC_STATUS1_OV_Msk   (0x3ffful << ADC_STATUS1_OV_Pos)
 
#define ADC_CURDAT_CURDAT_Pos   (0)
 
#define ADC_CURDAT_CURDAT_Msk   (0x3fffful << ADC_CURDAT_CURDAT_Pos)
 

Detailed Description

Configuration of the Cortex-M4 Processor and Core Peripherals

Macro Definition Documentation

◆ __CM4_REV

#define __CM4_REV   0x0201

Core Revision r2p1

Definition at line 191 of file NUC472_442.h.

◆ __FPU_PRESENT

#define __FPU_PRESENT   1

FPU present or not

Definition at line 195 of file NUC472_442.h.

◆ __MPU_PRESENT

#define __MPU_PRESENT   1

MPU present or not

Definition at line 194 of file NUC472_442.h.

◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   4

Number of Bits used for Priority Levels

Definition at line 192 of file NUC472_442.h.

◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 193 of file NUC472_442.h.

◆ ADC_CHEN_ADBGEN_Msk

#define ADC_CHEN_ADBGEN_Msk   (0x1ul << ADC_CHEN_ADBGEN_Pos)

ADC_T::CHEN: ADBGEN Mask

Definition at line 777 of file NUC472_442.h.

◆ ADC_CHEN_ADBGEN_Pos

#define ADC_CHEN_ADBGEN_Pos   (17)

ADC_T::CHEN: ADBGEN Position

Definition at line 776 of file NUC472_442.h.

◆ ADC_CHEN_ADTSEN_Msk

#define ADC_CHEN_ADTSEN_Msk   (0x1ul << ADC_CHEN_ADTSEN_Pos)

ADC_T::CHEN: ADTSEN Mask

Definition at line 774 of file NUC472_442.h.

◆ ADC_CHEN_ADTSEN_Pos

#define ADC_CHEN_ADTSEN_Pos   (16)

ADC_T::CHEN: ADTSEN Position

Definition at line 773 of file NUC472_442.h.

◆ ADC_CHEN_CHEN_Msk

#define ADC_CHEN_CHEN_Msk   (0xffful << ADC_CHEN_CHEN_Pos)

ADC_T::CHEN: CHEN Mask

Definition at line 771 of file NUC472_442.h.

◆ ADC_CHEN_CHEN_Pos

#define ADC_CHEN_CHEN_Pos   (0)

ADC_T::CHEN: CHEN Position

Definition at line 770 of file NUC472_442.h.

◆ ADC_CMP0_ADCMPEN_Msk

#define ADC_CMP0_ADCMPEN_Msk   (0x1ul << ADC_CMP0_ADCMPEN_Pos)

ADC_T::CMP: ADCMPEN Mask

Definition at line 780 of file NUC472_442.h.

◆ ADC_CMP0_ADCMPEN_Pos

#define ADC_CMP0_ADCMPEN_Pos   (0)

ADC_T::CMP: ADCMPEN Position

Definition at line 779 of file NUC472_442.h.

◆ ADC_CMP0_ADCMPIE_Msk

#define ADC_CMP0_ADCMPIE_Msk   (0x1ul << ADC_CMP0_ADCMPIE_Pos)

ADC_T::CMP: ADCMPIE Mask

Definition at line 783 of file NUC472_442.h.

◆ ADC_CMP0_ADCMPIE_Pos

#define ADC_CMP0_ADCMPIE_Pos   (1)

ADC_T::CMP: ADCMPIE Position

Definition at line 782 of file NUC472_442.h.

◆ ADC_CMP0_CMPCH_Msk

#define ADC_CMP0_CMPCH_Msk   (0xful << ADC_CMP0_CMPCH_Pos)

ADC_T::CMP: CMPCH Mask

Definition at line 789 of file NUC472_442.h.

◆ ADC_CMP0_CMPCH_Pos

#define ADC_CMP0_CMPCH_Pos   (3)

ADC_T::CMP: CMPCH Position

Definition at line 788 of file NUC472_442.h.

◆ ADC_CMP0_CMPCOND_Msk

#define ADC_CMP0_CMPCOND_Msk   (0x1ul << ADC_CMP0_CMPCOND_Pos)

ADC_T::CMP: CMPCOND Mask

Definition at line 786 of file NUC472_442.h.

◆ ADC_CMP0_CMPCOND_Pos

#define ADC_CMP0_CMPCOND_Pos   (2)

ADC_T::CMP: CMPCOND Position

Definition at line 785 of file NUC472_442.h.

◆ ADC_CMP0_CMPDAT_Msk

#define ADC_CMP0_CMPDAT_Msk   (0xffful << ADC_CMP0_CMPDAT_Pos)

ADC_T::CMP: CMPDAT Mask

Definition at line 795 of file NUC472_442.h.

◆ ADC_CMP0_CMPDAT_Pos

#define ADC_CMP0_CMPDAT_Pos   (16)

ADC_T::CMP: CMPDAT Position

Definition at line 794 of file NUC472_442.h.

◆ ADC_CMP0_CMPMCNT_Msk

#define ADC_CMP0_CMPMCNT_Msk   (0xful << ADC_CMP0_CMPMCNT_Pos)

ADC_T::CMP: CMPMCNT Mask

Definition at line 792 of file NUC472_442.h.

◆ ADC_CMP0_CMPMCNT_Pos

#define ADC_CMP0_CMPMCNT_Pos   (8)

ADC_T::CMP: CMPMCNT Position

Definition at line 791 of file NUC472_442.h.

◆ ADC_CMP1_ADCMPEN_Msk

#define ADC_CMP1_ADCMPEN_Msk   (0x1ul << ADC_CMP1_ADCMPEN_Pos)

ADC_T::CMP: ADCMPEN Mask

Definition at line 798 of file NUC472_442.h.

◆ ADC_CMP1_ADCMPEN_Pos

#define ADC_CMP1_ADCMPEN_Pos   (0)

ADC_T::CMP: ADCMPEN Position

Definition at line 797 of file NUC472_442.h.

◆ ADC_CMP1_ADCMPIE_Msk

#define ADC_CMP1_ADCMPIE_Msk   (0x1ul << ADC_CMP1_ADCMPIE_Pos)

ADC_T::CMP: ADCMPIE Mask

Definition at line 801 of file NUC472_442.h.

◆ ADC_CMP1_ADCMPIE_Pos

#define ADC_CMP1_ADCMPIE_Pos   (1)

ADC_T::CMP: ADCMPIE Position

Definition at line 800 of file NUC472_442.h.

◆ ADC_CMP1_CMPCH_Msk

#define ADC_CMP1_CMPCH_Msk   (0xful << ADC_CMP1_CMPCH_Pos)

ADC_T::CMP: CMPCH Mask

Definition at line 807 of file NUC472_442.h.

◆ ADC_CMP1_CMPCH_Pos

#define ADC_CMP1_CMPCH_Pos   (3)

ADC_T::CMP: CMPCH Position

Definition at line 806 of file NUC472_442.h.

◆ ADC_CMP1_CMPCOND_Msk

#define ADC_CMP1_CMPCOND_Msk   (0x1ul << ADC_CMP1_CMPCOND_Pos)

ADC_T::CMP: CMPCOND Mask

Definition at line 804 of file NUC472_442.h.

◆ ADC_CMP1_CMPCOND_Pos

#define ADC_CMP1_CMPCOND_Pos   (2)

ADC_T::CMP: CMPCOND Position

Definition at line 803 of file NUC472_442.h.

◆ ADC_CMP1_CMPDAT_Msk

#define ADC_CMP1_CMPDAT_Msk   (0xffful << ADC_CMP1_CMPDAT_Pos)

ADC_T::CMP: CMPDAT Mask

Definition at line 813 of file NUC472_442.h.

◆ ADC_CMP1_CMPDAT_Pos

#define ADC_CMP1_CMPDAT_Pos   (16)

ADC_T::CMP: CMPDAT Position

Definition at line 812 of file NUC472_442.h.

◆ ADC_CMP1_CMPMCNT_Msk

#define ADC_CMP1_CMPMCNT_Msk   (0xful << ADC_CMP1_CMPMCNT_Pos)

ADC_T::CMP: CMPMCNT Mask

Definition at line 810 of file NUC472_442.h.

◆ ADC_CMP1_CMPMCNT_Pos

#define ADC_CMP1_CMPMCNT_Pos   (8)

ADC_T::CMP: CMPMCNT Position

Definition at line 809 of file NUC472_442.h.

◆ ADC_CTL_ADCEN_Msk

#define ADC_CTL_ADCEN_Msk   (0x1ul << ADC_CTL_ADCEN_Pos)

ADC_T::CTL: ADCEN Mask

Definition at line 738 of file NUC472_442.h.

◆ ADC_CTL_ADCEN_Pos

#define ADC_CTL_ADCEN_Pos   (0)

ADC_T::CTL: ADCEN Position

Definition at line 737 of file NUC472_442.h.

◆ ADC_CTL_ADCIEN_Msk

#define ADC_CTL_ADCIEN_Msk   (0x1ul << ADC_CTL_ADCIEN_Pos)

ADC_T::CTL: ADCIEN Mask

Definition at line 741 of file NUC472_442.h.

◆ ADC_CTL_ADCIEN_Pos

#define ADC_CTL_ADCIEN_Pos   (1)

ADC_T::CTL: ADCIEN Position

Definition at line 740 of file NUC472_442.h.

◆ ADC_CTL_DIFFEN_Msk

#define ADC_CTL_DIFFEN_Msk   (0x1ul << ADC_CTL_DIFFEN_Pos)

ADC_T::CTL: DIFFEN Mask

Definition at line 759 of file NUC472_442.h.

◆ ADC_CTL_DIFFEN_Pos

#define ADC_CTL_DIFFEN_Pos   (10)

ADC_T::CTL: DIFFEN Position

Definition at line 758 of file NUC472_442.h.

◆ ADC_CTL_DMOF_Msk

#define ADC_CTL_DMOF_Msk   (0x1ul << ADC_CTL_DMOF_Pos)

ADC_T::CTL: DMOF Mask

Definition at line 768 of file NUC472_442.h.

◆ ADC_CTL_DMOF_Pos

#define ADC_CTL_DMOF_Pos   (31)

ADC_T::CTL: DMOF Position

Definition at line 767 of file NUC472_442.h.

◆ ADC_CTL_HWTRGCOND_Msk

#define ADC_CTL_HWTRGCOND_Msk   (0x3ul << ADC_CTL_HWTRGCOND_Pos)

ADC_T::CTL: HWTRGCOND Mask

Definition at line 750 of file NUC472_442.h.

◆ ADC_CTL_HWTRGCOND_Pos

#define ADC_CTL_HWTRGCOND_Pos   (6)

ADC_T::CTL: HWTRGCOND Position

Definition at line 749 of file NUC472_442.h.

◆ ADC_CTL_HWTRGEN_Msk

#define ADC_CTL_HWTRGEN_Msk   (0x1ul << ADC_CTL_HWTRGEN_Pos)

ADC_T::CTL: HWTRGEN Mask

Definition at line 753 of file NUC472_442.h.

◆ ADC_CTL_HWTRGEN_Pos

#define ADC_CTL_HWTRGEN_Pos   (8)

ADC_T::CTL: HWTRGEN Position

Definition at line 752 of file NUC472_442.h.

◆ ADC_CTL_HWTRGSEL_Msk

#define ADC_CTL_HWTRGSEL_Msk   (0x3ul << ADC_CTL_HWTRGSEL_Pos)

ADC_T::CTL: HWTRGSEL Mask

Definition at line 747 of file NUC472_442.h.

◆ ADC_CTL_HWTRGSEL_Pos

#define ADC_CTL_HWTRGSEL_Pos   (4)

ADC_T::CTL: HWTRGSEL Position

Definition at line 746 of file NUC472_442.h.

◆ ADC_CTL_OPMODE_Msk

#define ADC_CTL_OPMODE_Msk   (0x3ul << ADC_CTL_OPMODE_Pos)

ADC_T::CTL: OPMODE Mask

Definition at line 744 of file NUC472_442.h.

◆ ADC_CTL_OPMODE_Pos

#define ADC_CTL_OPMODE_Pos   (2)

ADC_T::CTL: OPMODE Position

Definition at line 743 of file NUC472_442.h.

◆ ADC_CTL_PDMAEN_Msk

#define ADC_CTL_PDMAEN_Msk   (0x1ul << ADC_CTL_PDMAEN_Pos)

ADC_T::CTL: PDMAEN Mask

Definition at line 756 of file NUC472_442.h.

◆ ADC_CTL_PDMAEN_Pos

#define ADC_CTL_PDMAEN_Pos   (9)

ADC_T::CTL: PDMAEN Position

Definition at line 755 of file NUC472_442.h.

◆ ADC_CTL_PWMTRGDLY_Msk

#define ADC_CTL_PWMTRGDLY_Msk   (0xfful << ADC_CTL_PWMTRGDLY_Pos)

ADC_T::CTL: PWMTRGDLY Mask

Definition at line 765 of file NUC472_442.h.

◆ ADC_CTL_PWMTRGDLY_Pos

#define ADC_CTL_PWMTRGDLY_Pos   (16)

ADC_T::CTL: PWMTRGDLY Position

Definition at line 764 of file NUC472_442.h.

◆ ADC_CTL_SWTRG_Msk

#define ADC_CTL_SWTRG_Msk   (0x1ul << ADC_CTL_SWTRG_Pos)

ADC_T::CTL: SWTRG Mask

Definition at line 762 of file NUC472_442.h.

◆ ADC_CTL_SWTRG_Pos

#define ADC_CTL_SWTRG_Pos   (11)

ADC_T::CTL: SWTRG Position

Definition at line 761 of file NUC472_442.h.

◆ ADC_CURDAT_CURDAT_Msk

#define ADC_CURDAT_CURDAT_Msk   (0x3fffful << ADC_CURDAT_CURDAT_Pos)

ADC_T::CURDAT: CURDAT Mask

Definition at line 837 of file NUC472_442.h.

◆ ADC_CURDAT_CURDAT_Pos

#define ADC_CURDAT_CURDAT_Pos   (0)

ADC_T::CURDAT: CURDAT Position

Definition at line 836 of file NUC472_442.h.

◆ ADC_DAT0_OV_Msk

#define ADC_DAT0_OV_Msk   (0x1ul << ADC_DAT0_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 615 of file NUC472_442.h.

◆ ADC_DAT0_OV_Pos

#define ADC_DAT0_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 614 of file NUC472_442.h.

◆ ADC_DAT0_RESULT_Msk

#define ADC_DAT0_RESULT_Msk   (0xfffful << ADC_DAT0_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 612 of file NUC472_442.h.

◆ ADC_DAT0_RESULT_Pos

#define ADC_DAT0_RESULT_Pos   (0)
@addtogroup ADC_CONST ADC Bit Field Definition
Constant Definitions for ADC Controller

ADC_T::DAT: RESULT Position

Definition at line 611 of file NUC472_442.h.

◆ ADC_DAT0_VALID_Msk

#define ADC_DAT0_VALID_Msk   (0x1ul << ADC_DAT0_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 618 of file NUC472_442.h.

◆ ADC_DAT0_VALID_Pos

#define ADC_DAT0_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 617 of file NUC472_442.h.

◆ ADC_DAT10_OV_Msk

#define ADC_DAT10_OV_Msk   (0x1ul << ADC_DAT10_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 705 of file NUC472_442.h.

◆ ADC_DAT10_OV_Pos

#define ADC_DAT10_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 704 of file NUC472_442.h.

◆ ADC_DAT10_RESULT_Msk

#define ADC_DAT10_RESULT_Msk   (0xfffful << ADC_DAT10_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 702 of file NUC472_442.h.

◆ ADC_DAT10_RESULT_Pos

#define ADC_DAT10_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 701 of file NUC472_442.h.

◆ ADC_DAT10_VALID_Msk

#define ADC_DAT10_VALID_Msk   (0x1ul << ADC_DAT10_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 708 of file NUC472_442.h.

◆ ADC_DAT10_VALID_Pos

#define ADC_DAT10_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 707 of file NUC472_442.h.

◆ ADC_DAT11_OV_Msk

#define ADC_DAT11_OV_Msk   (0x1ul << ADC_DAT11_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 714 of file NUC472_442.h.

◆ ADC_DAT11_OV_Pos

#define ADC_DAT11_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 713 of file NUC472_442.h.

◆ ADC_DAT11_RESULT_Msk

#define ADC_DAT11_RESULT_Msk   (0xfffful << ADC_DAT11_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 711 of file NUC472_442.h.

◆ ADC_DAT11_RESULT_Pos

#define ADC_DAT11_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 710 of file NUC472_442.h.

◆ ADC_DAT11_VALID_Msk

#define ADC_DAT11_VALID_Msk   (0x1ul << ADC_DAT11_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 717 of file NUC472_442.h.

◆ ADC_DAT11_VALID_Pos

#define ADC_DAT11_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 716 of file NUC472_442.h.

◆ ADC_DAT12_OV_Msk

#define ADC_DAT12_OV_Msk   (0x1ul << ADC_DAT12_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 723 of file NUC472_442.h.

◆ ADC_DAT12_OV_Pos

#define ADC_DAT12_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 722 of file NUC472_442.h.

◆ ADC_DAT12_RESULT_Msk

#define ADC_DAT12_RESULT_Msk   (0xfffful << ADC_DAT12_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 720 of file NUC472_442.h.

◆ ADC_DAT12_RESULT_Pos

#define ADC_DAT12_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 719 of file NUC472_442.h.

◆ ADC_DAT12_VALID_Msk

#define ADC_DAT12_VALID_Msk   (0x1ul << ADC_DAT12_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 726 of file NUC472_442.h.

◆ ADC_DAT12_VALID_Pos

#define ADC_DAT12_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 725 of file NUC472_442.h.

◆ ADC_DAT13_OV_Msk

#define ADC_DAT13_OV_Msk   (0x1ul << ADC_DAT13_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 732 of file NUC472_442.h.

◆ ADC_DAT13_OV_Pos

#define ADC_DAT13_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 731 of file NUC472_442.h.

◆ ADC_DAT13_RESULT_Msk

#define ADC_DAT13_RESULT_Msk   (0xfffful << ADC_DAT13_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 729 of file NUC472_442.h.

◆ ADC_DAT13_RESULT_Pos

#define ADC_DAT13_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 728 of file NUC472_442.h.

◆ ADC_DAT13_VALID_Msk

#define ADC_DAT13_VALID_Msk   (0x1ul << ADC_DAT13_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 735 of file NUC472_442.h.

◆ ADC_DAT13_VALID_Pos

#define ADC_DAT13_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 734 of file NUC472_442.h.

◆ ADC_DAT1_OV_Msk

#define ADC_DAT1_OV_Msk   (0x1ul << ADC_DAT1_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 624 of file NUC472_442.h.

◆ ADC_DAT1_OV_Pos

#define ADC_DAT1_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 623 of file NUC472_442.h.

◆ ADC_DAT1_RESULT_Msk

#define ADC_DAT1_RESULT_Msk   (0xfffful << ADC_DAT1_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 621 of file NUC472_442.h.

◆ ADC_DAT1_RESULT_Pos

#define ADC_DAT1_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 620 of file NUC472_442.h.

◆ ADC_DAT1_VALID_Msk

#define ADC_DAT1_VALID_Msk   (0x1ul << ADC_DAT1_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 627 of file NUC472_442.h.

◆ ADC_DAT1_VALID_Pos

#define ADC_DAT1_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 626 of file NUC472_442.h.

◆ ADC_DAT2_OV_Msk

#define ADC_DAT2_OV_Msk   (0x1ul << ADC_DAT2_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 633 of file NUC472_442.h.

◆ ADC_DAT2_OV_Pos

#define ADC_DAT2_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 632 of file NUC472_442.h.

◆ ADC_DAT2_RESULT_Msk

#define ADC_DAT2_RESULT_Msk   (0xfffful << ADC_DAT2_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 630 of file NUC472_442.h.

◆ ADC_DAT2_RESULT_Pos

#define ADC_DAT2_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 629 of file NUC472_442.h.

◆ ADC_DAT2_VALID_Msk

#define ADC_DAT2_VALID_Msk   (0x1ul << ADC_DAT2_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 636 of file NUC472_442.h.

◆ ADC_DAT2_VALID_Pos

#define ADC_DAT2_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 635 of file NUC472_442.h.

◆ ADC_DAT3_OV_Msk

#define ADC_DAT3_OV_Msk   (0x1ul << ADC_DAT3_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 642 of file NUC472_442.h.

◆ ADC_DAT3_OV_Pos

#define ADC_DAT3_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 641 of file NUC472_442.h.

◆ ADC_DAT3_RESULT_Msk

#define ADC_DAT3_RESULT_Msk   (0xfffful << ADC_DAT3_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 639 of file NUC472_442.h.

◆ ADC_DAT3_RESULT_Pos

#define ADC_DAT3_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 638 of file NUC472_442.h.

◆ ADC_DAT3_VALID_Msk

#define ADC_DAT3_VALID_Msk   (0x1ul << ADC_DAT3_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 645 of file NUC472_442.h.

◆ ADC_DAT3_VALID_Pos

#define ADC_DAT3_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 644 of file NUC472_442.h.

◆ ADC_DAT4_OV_Msk

#define ADC_DAT4_OV_Msk   (0x1ul << ADC_DAT4_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 651 of file NUC472_442.h.

◆ ADC_DAT4_OV_Pos

#define ADC_DAT4_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 650 of file NUC472_442.h.

◆ ADC_DAT4_RESULT_Msk

#define ADC_DAT4_RESULT_Msk   (0xfffful << ADC_DAT4_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 648 of file NUC472_442.h.

◆ ADC_DAT4_RESULT_Pos

#define ADC_DAT4_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 647 of file NUC472_442.h.

◆ ADC_DAT4_VALID_Msk

#define ADC_DAT4_VALID_Msk   (0x1ul << ADC_DAT4_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 654 of file NUC472_442.h.

◆ ADC_DAT4_VALID_Pos

#define ADC_DAT4_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 653 of file NUC472_442.h.

◆ ADC_DAT5_OV_Msk

#define ADC_DAT5_OV_Msk   (0x1ul << ADC_DAT5_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 660 of file NUC472_442.h.

◆ ADC_DAT5_OV_Pos

#define ADC_DAT5_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 659 of file NUC472_442.h.

◆ ADC_DAT5_RESULT_Msk

#define ADC_DAT5_RESULT_Msk   (0xfffful << ADC_DAT5_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 657 of file NUC472_442.h.

◆ ADC_DAT5_RESULT_Pos

#define ADC_DAT5_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 656 of file NUC472_442.h.

◆ ADC_DAT5_VALID_Msk

#define ADC_DAT5_VALID_Msk   (0x1ul << ADC_DAT5_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 663 of file NUC472_442.h.

◆ ADC_DAT5_VALID_Pos

#define ADC_DAT5_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 662 of file NUC472_442.h.

◆ ADC_DAT6_OV_Msk

#define ADC_DAT6_OV_Msk   (0x1ul << ADC_DAT6_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 669 of file NUC472_442.h.

◆ ADC_DAT6_OV_Pos

#define ADC_DAT6_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 668 of file NUC472_442.h.

◆ ADC_DAT6_RESULT_Msk

#define ADC_DAT6_RESULT_Msk   (0xfffful << ADC_DAT6_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 666 of file NUC472_442.h.

◆ ADC_DAT6_RESULT_Pos

#define ADC_DAT6_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 665 of file NUC472_442.h.

◆ ADC_DAT6_VALID_Msk

#define ADC_DAT6_VALID_Msk   (0x1ul << ADC_DAT6_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 672 of file NUC472_442.h.

◆ ADC_DAT6_VALID_Pos

#define ADC_DAT6_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 671 of file NUC472_442.h.

◆ ADC_DAT7_OV_Msk

#define ADC_DAT7_OV_Msk   (0x1ul << ADC_DAT7_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 678 of file NUC472_442.h.

◆ ADC_DAT7_OV_Pos

#define ADC_DAT7_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 677 of file NUC472_442.h.

◆ ADC_DAT7_RESULT_Msk

#define ADC_DAT7_RESULT_Msk   (0xfffful << ADC_DAT7_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 675 of file NUC472_442.h.

◆ ADC_DAT7_RESULT_Pos

#define ADC_DAT7_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 674 of file NUC472_442.h.

◆ ADC_DAT7_VALID_Msk

#define ADC_DAT7_VALID_Msk   (0x1ul << ADC_DAT7_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 681 of file NUC472_442.h.

◆ ADC_DAT7_VALID_Pos

#define ADC_DAT7_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 680 of file NUC472_442.h.

◆ ADC_DAT8_OV_Msk

#define ADC_DAT8_OV_Msk   (0x1ul << ADC_DAT8_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 687 of file NUC472_442.h.

◆ ADC_DAT8_OV_Pos

#define ADC_DAT8_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 686 of file NUC472_442.h.

◆ ADC_DAT8_RESULT_Msk

#define ADC_DAT8_RESULT_Msk   (0xfffful << ADC_DAT8_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 684 of file NUC472_442.h.

◆ ADC_DAT8_RESULT_Pos

#define ADC_DAT8_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 683 of file NUC472_442.h.

◆ ADC_DAT8_VALID_Msk

#define ADC_DAT8_VALID_Msk   (0x1ul << ADC_DAT8_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 690 of file NUC472_442.h.

◆ ADC_DAT8_VALID_Pos

#define ADC_DAT8_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 689 of file NUC472_442.h.

◆ ADC_DAT9_OV_Msk

#define ADC_DAT9_OV_Msk   (0x1ul << ADC_DAT9_OV_Pos)

ADC_T::DAT: OV Mask

Definition at line 696 of file NUC472_442.h.

◆ ADC_DAT9_OV_Pos

#define ADC_DAT9_OV_Pos   (16)

ADC_T::DAT: OV Position

Definition at line 695 of file NUC472_442.h.

◆ ADC_DAT9_RESULT_Msk

#define ADC_DAT9_RESULT_Msk   (0xfffful << ADC_DAT9_RESULT_Pos)

ADC_T::DAT: RESULT Mask

Definition at line 693 of file NUC472_442.h.

◆ ADC_DAT9_RESULT_Pos

#define ADC_DAT9_RESULT_Pos   (0)

ADC_T::DAT: RESULT Position

Definition at line 692 of file NUC472_442.h.

◆ ADC_DAT9_VALID_Msk

#define ADC_DAT9_VALID_Msk   (0x1ul << ADC_DAT9_VALID_Pos)

ADC_T::DAT: VALID Mask

Definition at line 699 of file NUC472_442.h.

◆ ADC_DAT9_VALID_Pos

#define ADC_DAT9_VALID_Pos   (17)

ADC_T::DAT: VALID Position

Definition at line 698 of file NUC472_442.h.

◆ ADC_STATUS0_ADCMPF0_Msk

#define ADC_STATUS0_ADCMPF0_Msk   (0x1ul << ADC_STATUS0_ADCMPF0_Pos)

ADC_T::STATUS0: ADCMPF0 Mask

Definition at line 819 of file NUC472_442.h.

◆ ADC_STATUS0_ADCMPF0_Pos

#define ADC_STATUS0_ADCMPF0_Pos   (1)

ADC_T::STATUS0: ADCMPF0 Position

Definition at line 818 of file NUC472_442.h.

◆ ADC_STATUS0_ADCMPF1_Msk

#define ADC_STATUS0_ADCMPF1_Msk   (0x1ul << ADC_STATUS0_ADCMPF1_Pos)

ADC_T::STATUS0: ADCMPF1 Mask

Definition at line 822 of file NUC472_442.h.

◆ ADC_STATUS0_ADCMPF1_Pos

#define ADC_STATUS0_ADCMPF1_Pos   (2)

ADC_T::STATUS0: ADCMPF1 Position

Definition at line 821 of file NUC472_442.h.

◆ ADC_STATUS0_ADIF_Msk

#define ADC_STATUS0_ADIF_Msk   (0x1ul << ADC_STATUS0_ADIF_Pos)

ADC_T::STATUS0: ADIF Mask

Definition at line 816 of file NUC472_442.h.

◆ ADC_STATUS0_ADIF_Pos

#define ADC_STATUS0_ADIF_Pos   (0)

ADC_T::STATUS0: ADIF Position

Definition at line 815 of file NUC472_442.h.

◆ ADC_STATUS0_BUSY_Msk

#define ADC_STATUS0_BUSY_Msk   (0x1ul << ADC_STATUS0_BUSY_Pos)

ADC_T::STATUS0: BUSY Mask

Definition at line 825 of file NUC472_442.h.

◆ ADC_STATUS0_BUSY_Pos

#define ADC_STATUS0_BUSY_Pos   (3)

ADC_T::STATUS0: BUSY Position

Definition at line 824 of file NUC472_442.h.

◆ ADC_STATUS0_CHANNEL_Msk

#define ADC_STATUS0_CHANNEL_Msk   (0xful << ADC_STATUS0_CHANNEL_Pos)

ADC_T::STATUS0: CHANNEL Mask

Definition at line 828 of file NUC472_442.h.

◆ ADC_STATUS0_CHANNEL_Pos

#define ADC_STATUS0_CHANNEL_Pos   (4)

ADC_T::STATUS0: CHANNEL Position

Definition at line 827 of file NUC472_442.h.

◆ ADC_STATUS1_OV_Msk

#define ADC_STATUS1_OV_Msk   (0x3ffful << ADC_STATUS1_OV_Pos)

ADC_T::STATUS1: OV Mask

Definition at line 834 of file NUC472_442.h.

◆ ADC_STATUS1_OV_Pos

#define ADC_STATUS1_OV_Pos   (16)

ADC_T::STATUS1: OV Position

Definition at line 833 of file NUC472_442.h.

◆ ADC_STATUS1_VALID_Msk

#define ADC_STATUS1_VALID_Msk   (0x3ffful << ADC_STATUS1_VALID_Pos)

ADC_T::STATUS1: VALID Mask

Definition at line 831 of file NUC472_442.h.

◆ ADC_STATUS1_VALID_Pos

#define ADC_STATUS1_VALID_Pos   (0)

ADC_T::STATUS1: VALID Position

Definition at line 830 of file NUC472_442.h.

Typedef Documentation

◆ IRQn_Type

typedef enum IRQn IRQn_Type

Interrupt Number Definition.

Enumeration Type Documentation

◆ IRQn

enum IRQn

Interrupt Number Definition.

Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Memory Management Interrupt

BusFault_IRQn 

5 Bus Fault Interrupt

UsageFault_IRQn 

6 Usage Fault Interrupt

SVCall_IRQn 

11 SV Call Interrupt

DebugMonitor_IRQn 

12 Debug Monitor Interrupt

PendSV_IRQn 

14 Pend SV Interrupt

SysTick_IRQn 

15 System Tick Interrupt

BOD_IRQn 

Brown Out detection Interrupt

IRC_IRQn 

Internal RC Interrupt

PWRWU_IRQn 

Power Down Wake Up Interrupt

SRAMF_IRQn 

SRAM Parity Check Failed Interrupt

CLKF_IRQn 

Clock Detection Failed Interrupt

RTC_IRQn 

Real Time Clock Interrupt

TAMPER_IRQn 

Tamper detection Interrupt

EINT0_IRQn 

External Input 0 Interrupt

EINT1_IRQn 

External Input 1 Interrupt

EINT2_IRQn 

External Input 2 Interrupt

EINT3_IRQn 

External Input 3 Interrupt

EINT4_IRQn 

External Input 4 Interrupt

EINT5_IRQn 

External Input 5 Interrupt

EINT6_IRQn 

External Input 6 Interrupt

EINT7_IRQn 

External Input 7 Interrupt

GPA_IRQn 

GPIO Port A Interrupt

GPB_IRQn 

GPIO Port B Interrupt

GPC_IRQn 

GPIO Port C Interrupt

GPD_IRQn 

GPIO Port D Interrupt

GPE_IRQn 

GPIO Port E Interrupt

GPF_IRQn 

GPIO Port F Interrupt

GPG_IRQn 

GPIO Port G Interrupt

GPH_IRQn 

GPIO Port H Interrupt

GPI_IRQn 

GPIO Port I Interrupt

TMR0_IRQn 

Timer 0 Interrupt

TMR1_IRQn 

Timer 1 Interrupt

TMR2_IRQn 

Timer 2 Interrupt

TMR3_IRQn 

Timer 3 Interrupt

PDMA_IRQn 

Peripheral DMA Interrupt

ADC_IRQn 

ADC Interrupt

WDT_IRQn 

Watch Dog Timer Interrupt

WWDT_IRQn 

Window Watch Dog Timer Interrupt

EADC0_IRQn 

Enhanced ADC 0 Interrupt

EADC1_IRQn 

Enhanced ADC 1 Interrupt

EADC2_IRQn 

Enhanced ADC 2 Interrupt

EADC3_IRQn 

Enhanced ADC 3 Interrupt

ACMP_IRQn 

Analog Comparator Interrupt

OPA0_IRQn 

OPA 0 Interrupt

OPA1_IRQn 

OPA 1 Interrupt

ICAP0_IRQn 

Input Capture 0 Interrupt

ICAP1_IRQn 

Input Capture 1 Interrupt

PWM0CH0_IRQn 

PWM 0 Channel 0 Interrupt

PWM0CH1_IRQn 

PWM 0 Channel 1 Interrupt

PWM0CH2_IRQn 

PWM 0 Channel 2 Interrupt

PWM0CH3_IRQn 

PWM 0 Channel 3 Interrupt

PWM0CH4_IRQn 

PWM 0 Channel 4 Interrupt

PWM0CH5_IRQn 

PWM 0 Channel 5 Interrupt

PWM0_BRK_IRQn 

PWM 0 Brake Interrupt

QEI0_IRQn 

QEI 0 Interrupt

PWM1CH0_IRQn 

PWM 1 Channel 0 Interrupt

PWM1CH1_IRQn 

PWM 1 Channel 1 Interrupt

PWM1CH2_IRQn 

PWM 1 Channel 2 Interrupt

PWM1CH3_IRQn 

PWM 1 Channel 3 Interrupt

PWM1CH4_IRQn 

PWM 1 Channel 4 Interrupt

PWM1CH5_IRQn 

PWM 1 Channel 5 Interrupt

PWM1BRK_IRQn 

PWM 1 Brake Interrupt

QEI1_IRQn 

QEI 1 Interrupt

EPWM0_IRQn 

Enhanced PWM 0 Interrupt

EPWM0BRK_IRQn 

Enhanced PWM 0 Brake Interrupt

EPWM1_IRQn 

Enhanced PWM 1 Interrupt

EPWM1BRK_IRQn 

Enhanced PWM 1 Brake Interrupt

USBD_IRQn 

USB FS Device Interrupt

USBH_IRQn 

USB FS Host Interrupt

USB_OTG_IRQn 

USB OTG Interrupt

EMAC_TX_IRQn 

Ethernet MAC TX Interrupt

EMAC_RX_IRQn 

Ethernet MAC RX Interrupt

SPI0_IRQn 

SPI 0 Interrupt

SPI1_IRQn 

SPI 1 Interrupt

SPI2_IRQn 

SPI 2 Interrupt

SPI3_IRQn 

SPI 3 Interrupt

UART0_IRQn 

UART 0 Interrupt

UART1_IRQn 

UART 1 Interrupt

UART2_IRQn 

UART 2 Interrupt

UART3_IRQn 

UART 3 Interrupt

UART4_IRQn 

UART 4 Interrupt

UART5_IRQn 

UART 5 Interrupt

I2C0_IRQn 

I2C 0 Interrupt

I2C1_IRQn 

I2C 1 Interrupt

I2C2_IRQn 

I2C 2 Interrupt

I2C3_IRQn 

I2C 3 Interrupt

I2C4_IRQn 

I2C 4 Interrupt

SC0_IRQn 

Smart Card 0 Interrupt

SC1_IRQn 

Smart Card 1 Interrupt

SC2_IRQn 

Smart Card 2 Interrupt

SC3_IRQn 

Smart Card 3 Interrupt

SC4_IRQn 

Smart Card 4 Interrupt

SC5_IRQn 

Smart Card 5 Interrupt

CAN0_IRQn 

CAN 0 Interrupt

CAN1_IRQn 

CAN 1 Interrupt

I2S0_IRQn 

I2S 0 Interrupt

I2S1_IRQn 

I2S 1 Interrupt

SD_IRQn 

SD Host Interrupt

PS2D_IRQn 

PS/2 device Interrupt

CAP_IRQn 

VCAP Interrupt

CRPT_IRQn 

Cryptographic Accelerator Interrupt

CRC_IRQn 

CRC Interrupt

Definition at line 71 of file NUC472_442.h.