48#define PS2_SET_TX_BYTE_CNT(u32Count) (PS2->CTL = (PS2->CTL & ~PS2_CTL_TXFDEPTH_Msk) \
49 | ((u32Count-1) << PS2_CTL_TXFDEPTH_Pos))
59#define PS2_GET_STATUS() (PS2->STATUS)
69#define PS2_CLR_STATUS(u32Mask) (PS2D->PS2STATUS = u32Mask)
82 PS2->CTL &= ~PS2_CTL_CLRFIFO_Msk;
93#define PS2_CLR_RX_INT_FLAG() (PS2->INTSTS = PS2_INTSTS_RXIF_Msk)
103#define PS2_CLR_TX_INT_FLAG() (PS2->INTSTS = PS2_INTSTS_TXIF_Msk)
114#define PS2_GET_INT_FLAG(u32IntFlag) ((PS2->INTSTS & u32IntFlag)?1:0)
124#define PS2_DISABLE_OVERRIDE() (PS2->CTL &= ~PS2_CTL_PS2EN_Msk)
134#define PS2_ENABLE_OVERRIDE() (PS2->CTL |= PS2_CTL_PS2EN_Msk)
144#define PS2_GET_TX_BYTE_INDEX() ((PS2->STATUS & PS2_STATUS_BYTEIDX_Msk) >> PS2_STATUS_BYTEIDX_Pos)
154#define PS2_SET_DATA_LOW() (PS2->CTL &= ~PS2_CTL_FPS2DAT_Msk)
164#define PS2_SET_DATA_HIGH() (PS2->CTL |= PS2_CTL_FPS2DAT_Msk)
174#define PS2_SET_CLK_LOW() (PS2->CTL &= ~PS2_CTL_FPS2CLK_Msk)
184#define PS2_SET_CLK_HIGH() (PS2->CTL |= PS2_CTL_FPS2CLK_Msk)
194#define PS2_DISABLE_ACK_ALWAYS() (PS2->CTL |= PS2_CTL_ACK_Msk)
204#define PS2_ENABLE_ACK_ALWAYS() (PS2->CTL &= ~PS2_CTL_ACK_Msk)
214int32_t
PS2_Write(uint32_t *pu32Buf, uint32_t u32ByteCount);
NUC472/NUC442 peripheral access layer header file. This file contains all the peripheral register's d...
#define PS2_CTL_CLRFIFO_Msk
int32_t PS2_Write(uint32_t *pu32Buf, uint32_t u32ByteCount)
This function use to transmit PS2 data.
void PS2_Close(void)
This function use to disable PS2 function.
void PS2_DisableInt(uint32_t u32Mask)
The function is used to disable PS2 specified interrupt.
void PS2_EnableInt(uint32_t u32Mask)
The function is used to enable PS2 specified interrupt.
void PS2_Open(void)
This function use to enable PS2 function and set one byte per trnasfer.
uint8_t PS2_Read(void)
This function use to read PS2 Rx data.
__STATIC_INLINE void PS2_CLEAR_TX_FIFO(void)
This function use to clear PS2 Tx FIFO.