45 uint32_t u32MasterSlave,
47 uint32_t u32DataWidth,
50 uint32_t u32ClkSrc = 0U, u32Div, u32HCLKFreq, u32RetValue=0U;
53 spi->
I2SCTL &= ~SPI_I2SCTL_I2SEN_Msk;
55 if(u32DataWidth == 32U)
71 if(u32BusClock >= u32HCLKFreq)
173 if(u32BusClock >= u32HCLKFreq)
178 u32RetValue = u32ClkSrc;
180 else if(u32BusClock >= u32ClkSrc)
185 u32RetValue = u32ClkSrc;
187 else if(u32BusClock == 0U)
192 u32RetValue = (u32ClkSrc / (0xFFU + 1U));
196 u32Div = (((u32ClkSrc * 10U) / u32BusClock + 5U) / 10U) - 1U;
202 u32RetValue = (u32ClkSrc / (0xFFU + 1U));
208 u32RetValue = (u32ClkSrc / (u32Div + 1U));
265 SYS->IPRST1 &= ~SYS_IPRST1_SPI0RST_Msk;
271 SYS->IPRST1 &= ~SYS_IPRST1_SPI1RST_Msk;
277 SYS->IPRST1 &= ~SYS_IPRST1_SPI2RST_Msk;
283 SYS->IPRST2 &= ~SYS_IPRST2_SPI3RST_Msk;
349 uint32_t u32ClkSrc, u32HCLKFreq;
350 uint32_t u32Div, u32RetValue;
355 if(u32BusClock >= u32HCLKFreq)
450 if(u32BusClock >= u32HCLKFreq)
455 u32RetValue = u32ClkSrc;
457 else if(u32BusClock >= u32ClkSrc)
462 u32RetValue = u32ClkSrc;
464 else if(u32BusClock == 0U)
469 u32RetValue = (u32ClkSrc / (0xFFU + 1U));
473 u32Div = (((u32ClkSrc * 10U) / u32BusClock + 5U) / 10U) - 1U;
479 u32RetValue = (u32ClkSrc / (0xFFU + 1U));
485 u32RetValue = (u32ClkSrc / (u32Div + 1U));
604 return (u32ClkSrc / (u32Div + 1U));
715 spi->
CTL &= ~SPI_CTL_UNITIEN_Msk;
721 spi->
SSCTL &= ~SPI_SSCTL_SSACTIEN_Msk;
727 spi->
SSCTL &= ~SPI_SSCTL_SSINAIEN_Msk;
733 spi->
SSCTL &= ~SPI_SSCTL_SLVURIEN_Msk;
739 spi->
SSCTL &= ~SPI_SSCTL_SLVBEIEN_Msk;
745 spi->
FIFOCTL &= ~SPI_FIFOCTL_TXUFIEN_Msk;
751 spi->
FIFOCTL &= ~SPI_FIFOCTL_TXTHIEN_Msk;
757 spi->
FIFOCTL &= ~SPI_FIFOCTL_RXTHIEN_Msk;
763 spi->
FIFOCTL &= ~SPI_FIFOCTL_RXOVIEN_Msk;
769 spi->
FIFOCTL &= ~SPI_FIFOCTL_RXTOIEN_Msk;
795 uint32_t u32IntFlag = 0U, u32TmpVal;
951 uint32_t u32Flag = 0U, u32TmpValue;
1043 else if(i2s ==
SPI1)
1063 else if(i2s ==
SPI2)
1133uint32_t
SPII2S_Open(
SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat)
1135 uint32_t u32Divider;
1136 uint32_t u32BitRate, u32SrcClk, u32RetValue;
1142 SYS->IPRST1 &= ~SYS_IPRST1_SPI0RST_Msk;
1144 else if(i2s ==
SPI1)
1147 SYS->IPRST1 &= ~SYS_IPRST1_SPI1RST_Msk;
1149 else if(i2s ==
SPI2)
1152 SYS->IPRST1 &= ~SYS_IPRST1_SPI2RST_Msk;
1157 SYS->IPRST2 &= ~SYS_IPRST2_SPI3RST_Msk;
1161 i2s->
I2SCTL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat;
1172 u32Divider = ((u32SrcClk / u32BitRate) >> 1U) - 1U;
1178 u32BitRate = u32SrcClk / ((u32Divider + 1U) * 2U);
1186 u32RetValue = u32SampleRate;
1191 i2s->
I2SCLK &= ~SPI_I2SCLK_BCLKDIV_Msk;
1202 else if(i2s ==
SPI1)
1211 else if(i2s ==
SPI2)
1242 i2s->
I2SCTL &= ~SPI_I2SCTL_I2SEN_Msk;
1325 i2s->
FIFOCTL &= ~SPI_FIFOCTL_TXTHIEN_Msk;
1331 i2s->
FIFOCTL &= ~SPI_FIFOCTL_RXTHIEN_Msk;
1337 i2s->
FIFOCTL &= ~SPI_FIFOCTL_RXOVIEN_Msk;
1343 i2s->
FIFOCTL &= ~SPI_FIFOCTL_RXTOIEN_Msk;
1349 i2s->
FIFOCTL &= ~SPI_FIFOCTL_TXUFIEN_Msk;
1355 i2s->
I2SCTL &= ~SPI_I2SCTL_RZCIEN_Msk;
1361 i2s->
I2SCTL &= ~SPI_I2SCTL_LZCIEN_Msk;
1375 uint32_t u32Divider;
1376 uint32_t u32SrcClk, u32RetValue;
1379 if(u32BusClock == u32SrcClk)
1385 u32Divider = (u32SrcClk / u32BusClock) >> 1U;
1387 if(u32Divider > 0x3FU)
1399 if(u32Divider == 0U)
1401 u32RetValue = u32SrcClk;
1405 u32RetValue = ((u32SrcClk >> 1U) / u32Divider);
1419 i2s->
I2SCTL &= ~SPI_I2SCTL_MCLKEN_Msk;
NuMicro peripheral access layer header file.
#define CLK_CLKSEL2_SPI3SEL_HXT
#define CLK_CLKSEL2_SPI3SEL_PLL
#define CLK_CLKSEL2_SPI0SEL_HXT
#define CLK_CLKSEL2_SPI0SEL_PLL
#define CLK_CLKSEL2_SPI1SEL_PCLK0
#define CLK_CLKSEL2_SPI0SEL_PCLK1
#define CLK_CLKSEL2_SPI2SEL_PCLK1
#define CLK_CLKSEL2_SPI3SEL_PCLK0
#define CLK_CLKSEL2_SPI1SEL_PLL
#define CLK_CLKSEL2_SPI2SEL_PLL
#define CLK_CLKSEL2_SPI2SEL_HXT
#define CLK_CLKSEL2_SPI1SEL_HXT
uint32_t CLK_GetHCLKFreq(void)
Get HCLK frequency.
uint32_t CLK_GetPCLK1Freq(void)
Get PCLK1 frequency.
uint32_t CLK_GetPCLK0Freq(void)
Get PCLK0 frequency.
uint32_t CLK_GetPLLClockFreq(void)
Get PLL clock frequency.
#define SYS_IPRST2_SPI3RST_Msk
#define SPI_STATUS_TXFULL_Msk
#define SPI_SSCTL_SSACTPOL_Msk
#define SPI_FIFOCTL_RXOVIEN_Msk
#define SPI_STATUS_SSACTIF_Msk
#define SPI_CTL_UNITIEN_Msk
#define SPI_FIFOCTL_RXTH_Pos
#define CLK_CLKSEL2_SPI1SEL_Msk
#define SPI_FIFOCTL_TXTH_Msk
#define SPI_CTL_DWIDTH_Pos
#define SPI_I2SCTL_TXEN_Msk
#define SPI_STATUS_TXRXRST_Msk
#define SPI_STATUS_TXTHIF_Msk
#define SPI_I2SCTL_LZCIEN_Msk
#define SPI_STATUS_RXTHIF_Msk
#define SYS_IPRST1_SPI2RST_Msk
#define CLK_CLKSEL2_SPI2SEL_Msk
#define SPI_I2SCTL_RZCIEN_Msk
#define SPI_STATUS_UNITIF_Msk
#define SPI_SSCTL_SSACTIEN_Msk
#define SPI_CLKDIV_DIVIDER_Pos
#define CLK_CLKSEL2_SPI0SEL_Msk
#define SYS_IPRST1_SPI1RST_Msk
#define SPI_STATUS_SSINAIF_Msk
#define SYS_IPRST1_SPI0RST_Msk
#define SPI_FIFOCTL_TXUFIEN_Msk
#define SPI_CLKDIV_DIVIDER_Msk
#define SPI_FIFOCTL_TXTH_Pos
#define SPI_CTL_SPIEN_Msk
#define SPI_SSCTL_SLVBEIEN_Msk
#define SPI_STATUS_TXEMPTY_Msk
#define SPI_SSCTL_SSINAIEN_Msk
#define SPI_STATUS_RXOVIF_Msk
#define SPI_I2SCTL_WDWIDTH_Pos
#define SPI_I2SCTL_RXEN_Msk
#define SPI_FIFOCTL_RXTOIEN_Msk
#define SPI_FIFOCTL_RXTHIEN_Msk
#define SPI_STATUS_RXFULL_Msk
#define SPI_FIFOCTL_RXTH_Msk
#define SPI_I2SCTL_I2SEN_Msk
#define SPI_STATUS_SLVBEIF_Msk
#define SPI_STATUS_RXTOIF_Msk
#define SPI_STATUS_RXEMPTY_Msk
#define SPI_STATUS_SSLINE_Msk
#define SPI_SSCTL_SLVURIEN_Msk
#define SPI_STATUS_TXUFIF_Msk
#define SPI_STATUS_SLVURIF_Msk
#define SPI_FIFOCTL_TXFBCLR_Msk
#define SPI_FIFOCTL_TXTHIEN_Msk
#define SPI_STATUS_SPIENSTS_Msk
#define SPI_FIFOCTL_RXFBCLR_Msk
#define SPI_SSCTL_AUTOSS_Msk
#define SPI_I2SCTL_MCLKEN_Msk
#define SPI_STATUS_BUSY_Msk
#define CLK_CLKSEL2_SPI3SEL_Msk
#define SPI_I2SCLK_MCLKDIV_Pos
#define SPI_I2SCLK_BCLKDIV_Pos
#define SPI_FIFO_RXTO_INT_MASK
#define SPII2S_RIGHT_ZC_INT_MASK
#define SPII2S_FIFO_RXTH_INT_MASK
#define SPI_RX_EMPTY_MASK
#define SPI_FIFO_RXTH_INT_MASK
#define SPI_SLVBE_INT_MASK
#define SPI_SSACT_INT_MASK
#define SPII2S_FIFO_RXOV_INT_MASK
#define SPI_SSLINE_STS_MASK
#define SPI_SSINACT_INT_MASK
#define SPII2S_FIFO_RXTO_INT_MASK
#define SPI_SS_ACTIVE_LOW
#define SPI_UNIT_INT_MASK
#define SPI_FIFO_TXTH_INT_MASK
#define SPI_TX_EMPTY_MASK
#define SPI_TXRX_RESET_MASK
#define SPI_TXUF_INT_MASK
#define SPII2S_LEFT_ZC_INT_MASK
#define SPI_FIFO_RXOV_INT_MASK
#define SPI_SLVUR_INT_MASK
#define SPI_SPIEN_STS_MASK
#define SPII2S_TXUF_INT_MASK
#define SPII2S_FIFO_TXTH_INT_MASK
uint32_t SPII2S_Open(SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat)
This function configures some parameters of I2S interface for general purpose use.
void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)
Disable interrupt function.
void SPII2S_Close(SPI_T *i2s)
Disable I2S function.
uint32_t SPII2S_EnableMCLK(SPI_T *i2s, uint32_t u32BusClock)
Enable master clock (MCLK).
void SPII2S_DisableMCLK(SPI_T *i2s)
Disable master clock (MCLK).
uint32_t SPI_GetIntFlag(SPI_T *spi, uint32_t u32Mask)
Get interrupt flag.
void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask)
Enable interrupt function.
void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)
Enable interrupt function.
void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave selection function.
void SPI_DisableAutoSS(SPI_T *spi)
Disable the automatic slave selection function.
void SPI_ClearIntFlag(SPI_T *spi, uint32_t u32Mask)
Clear interrupt flag.
uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
Set the SPI bus clock.
void SPI_Close(SPI_T *spi)
Disable SPI controller.
void SPI_SetFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask)
Disable interrupt function.
uint32_t SPI_GetStatus(SPI_T *spi, uint32_t u32Mask)
Get SPI status.
void SPI_ClearTxFIFO(SPI_T *spi)
Clear TX FIFO buffer.
uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make SPI module be ready to transfer.
void SPII2S_SetFIFO(SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
uint32_t SPI_GetBusClock(SPI_T *spi)
Get the actual frequency of SPI bus clock. Only available in Master mode.
void SPI_ClearRxFIFO(SPI_T *spi)
Clear RX FIFO buffer.
static uint32_t SPII2S_GetSourceClockFreq(SPI_T *i2s)
This function is used to get I2S source clock frequency.