M480 BSP V3.05.006
The Board Support Package for M480 Series
qspi_reg.h
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1/**************************************************************************/
9#ifndef __QSPI_REG_H__
10#define __QSPI_REG_H__
11
12#if defined ( __CC_ARM )
13#pragma anon_unions
14#endif
15
26typedef struct
27{
28
29
785 __IO uint32_t CTL;
786 __IO uint32_t CLKDIV;
787 __IO uint32_t SSCTL;
788 __IO uint32_t PDMACTL;
789 __IO uint32_t FIFOCTL;
790 __IO uint32_t STATUS;
792 __I uint32_t RESERVE0[2];
794 __O uint32_t TX;
796 __I uint32_t RESERVE1[3];
798 __I uint32_t RX;
800} QSPI_T;
801
807#define QSPI_CTL_QSPIEN_Pos (0)
808#define QSPI_CTL_QSPIEN_Msk (0x1ul << QSPI_CTL_QSPIEN_Pos)
810#define QSPI_CTL_RXNEG_Pos (1)
811#define QSPI_CTL_RXNEG_Msk (0x1ul << QSPI_CTL_RXNEG_Pos)
813#define QSPI_CTL_TXNEG_Pos (2)
814#define QSPI_CTL_TXNEG_Msk (0x1ul << QSPI_CTL_TXNEG_Pos)
816#define QSPI_CTL_CLKPOL_Pos (3)
817#define QSPI_CTL_CLKPOL_Msk (0x1ul << QSPI_CTL_CLKPOL_Pos)
819#define QSPI_CTL_SUSPITV_Pos (4)
820#define QSPI_CTL_SUSPITV_Msk (0xful << QSPI_CTL_SUSPITV_Pos)
822#define QSPI_CTL_DWIDTH_Pos (8)
823#define QSPI_CTL_DWIDTH_Msk (0x1ful << QSPI_CTL_DWIDTH_Pos)
825#define QSPI_CTL_LSB_Pos (13)
826#define QSPI_CTL_LSB_Msk (0x1ul << QSPI_CTL_LSB_Pos)
828#define QSPI_CTL_HALFDPX_Pos (14)
829#define QSPI_CTL_HALFDPX_Msk (0x1ul << QSPI_CTL_HALFDPX_Pos)
831#define QSPI_CTL_RXONLY_Pos (15)
832#define QSPI_CTL_RXONLY_Msk (0x1ul << QSPI_CTL_RXONLY_Pos)
834#define QSPI_CTL_TWOBIT_Pos (16)
835#define QSPI_CTL_TWOBIT_Msk (0x1ul << QSPI_CTL_TWOBIT_Pos)
837#define QSPI_CTL_UNITIEN_Pos (17)
838#define QSPI_CTL_UNITIEN_Msk (0x1ul << QSPI_CTL_UNITIEN_Pos)
840#define QSPI_CTL_SLAVE_Pos (18)
841#define QSPI_CTL_SLAVE_Msk (0x1ul << QSPI_CTL_SLAVE_Pos)
843#define QSPI_CTL_REORDER_Pos (19)
844#define QSPI_CTL_REORDER_Msk (0x1ul << QSPI_CTL_REORDER_Pos)
846#define QSPI_CTL_DATDIR_Pos (20)
847#define QSPI_CTL_DATDIR_Msk (0x1ul << QSPI_CTL_DATDIR_Pos)
849#define QSPI_CTL_DUALIOEN_Pos (21)
850#define QSPI_CTL_DUALIOEN_Msk (0x1ul << QSPI_CTL_DUALIOEN_Pos)
852#define QSPI_CTL_QUADIOEN_Pos (22)
853#define QSPI_CTL_QUADIOEN_Msk (0x1ul << QSPI_CTL_QUADIOEN_Pos)
855#define QSPI_CLKDIV_DIVIDER_Pos (0)
856#define QSPI_CLKDIV_DIVIDER_Msk (0x1fful << QSPI_CLKDIV_DIVIDER_Pos)
858#define QSPI_SSCTL_SS_Pos (0)
859#define QSPI_SSCTL_SS_Msk (0x1ul << QSPI_SSCTL_SS_Pos)
861#define QSPI_SSCTL_SSACTPOL_Pos (2)
862#define QSPI_SSCTL_SSACTPOL_Msk (0x1ul << QSPI_SSCTL_SSACTPOL_Pos)
864#define QSPI_SSCTL_AUTOSS_Pos (3)
865#define QSPI_SSCTL_AUTOSS_Msk (0x1ul << QSPI_SSCTL_AUTOSS_Pos)
867#define QSPI_SSCTL_SLV3WIRE_Pos (4)
868#define QSPI_SSCTL_SLV3WIRE_Msk (0x1ul << QSPI_SSCTL_SLV3WIRE_Pos)
870#define QSPI_SSCTL_SLVTOIEN_Pos (5)
871#define QSPI_SSCTL_SLVTOIEN_Msk (0x1ul << QSPI_SSCTL_SLVTOIEN_Pos)
873#define QSPI_SSCTL_SLVTORST_Pos (6)
874#define QSPI_SSCTL_SLVTORST_Msk (0x1ul << QSPI_SSCTL_SLVTORST_Pos)
876#define QSPI_SSCTL_SLVBEIEN_Pos (8)
877#define QSPI_SSCTL_SLVBEIEN_Msk (0x1ul << QSPI_SSCTL_SLVBEIEN_Pos)
879#define QSPI_SSCTL_SLVURIEN_Pos (9)
880#define QSPI_SSCTL_SLVURIEN_Msk (0x1ul << QSPI_SSCTL_SLVURIEN_Pos)
882#define QSPI_SSCTL_SSACTIEN_Pos (12)
883#define QSPI_SSCTL_SSACTIEN_Msk (0x1ul << QSPI_SSCTL_SSACTIEN_Pos)
885#define QSPI_SSCTL_SSINAIEN_Pos (13)
886#define QSPI_SSCTL_SSINAIEN_Msk (0x1ul << QSPI_SSCTL_SSINAIEN_Pos)
888#define QSPI_SSCTL_SLVTOCNT_Pos (16)
889#define QSPI_SSCTL_SLVTOCNT_Msk (0xfffful << QSPI_SSCTL_SLVTOCNT_Pos)
891#define QSPI_PDMACTL_TXPDMAEN_Pos (0)
892#define QSPI_PDMACTL_TXPDMAEN_Msk (0x1ul << QSPI_PDMACTL_TXPDMAEN_Pos)
894#define QSPI_PDMACTL_RXPDMAEN_Pos (1)
895#define QSPI_PDMACTL_RXPDMAEN_Msk (0x1ul << QSPI_PDMACTL_RXPDMAEN_Pos)
897#define QSPI_PDMACTL_PDMARST_Pos (2)
898#define QSPI_PDMACTL_PDMARST_Msk (0x1ul << QSPI_PDMACTL_PDMARST_Pos)
900#define QSPI_FIFOCTL_RXRST_Pos (0)
901#define QSPI_FIFOCTL_RXRST_Msk (0x1ul << QSPI_FIFOCTL_RXRST_Pos)
903#define QSPI_FIFOCTL_TXRST_Pos (1)
904#define QSPI_FIFOCTL_TXRST_Msk (0x1ul << QSPI_FIFOCTL_TXRST_Pos)
906#define QSPI_FIFOCTL_RXTHIEN_Pos (2)
907#define QSPI_FIFOCTL_RXTHIEN_Msk (0x1ul << QSPI_FIFOCTL_RXTHIEN_Pos)
909#define QSPI_FIFOCTL_TXTHIEN_Pos (3)
910#define QSPI_FIFOCTL_TXTHIEN_Msk (0x1ul << QSPI_FIFOCTL_TXTHIEN_Pos)
912#define QSPI_FIFOCTL_RXTOIEN_Pos (4)
913#define QSPI_FIFOCTL_RXTOIEN_Msk (0x1ul << QSPI_FIFOCTL_RXTOIEN_Pos)
915#define QSPI_FIFOCTL_RXOVIEN_Pos (5)
916#define QSPI_FIFOCTL_RXOVIEN_Msk (0x1ul << QSPI_FIFOCTL_RXOVIEN_Pos)
918#define QSPI_FIFOCTL_TXUFPOL_Pos (6)
919#define QSPI_FIFOCTL_TXUFPOL_Msk (0x1ul << QSPI_FIFOCTL_TXUFPOL_Pos)
921#define QSPI_FIFOCTL_TXUFIEN_Pos (7)
922#define QSPI_FIFOCTL_TXUFIEN_Msk (0x1ul << QSPI_FIFOCTL_TXUFIEN_Pos)
924#define QSPI_FIFOCTL_RXFBCLR_Pos (8)
925#define QSPI_FIFOCTL_RXFBCLR_Msk (0x1ul << QSPI_FIFOCTL_RXFBCLR_Pos)
927#define QSPI_FIFOCTL_TXFBCLR_Pos (9)
928#define QSPI_FIFOCTL_TXFBCLR_Msk (0x1ul << QSPI_FIFOCTL_TXFBCLR_Pos)
930#define QSPI_FIFOCTL_RXTH_Pos (24)
931#define QSPI_FIFOCTL_RXTH_Msk (0x7ul << QSPI_FIFOCTL_RXTH_Pos)
933#define QSPI_FIFOCTL_TXTH_Pos (28)
934#define QSPI_FIFOCTL_TXTH_Msk (0x7ul << QSPI_FIFOCTL_TXTH_Pos)
936#define QSPI_STATUS_BUSY_Pos (0)
937#define QSPI_STATUS_BUSY_Msk (0x1ul << QSPI_STATUS_BUSY_Pos)
939#define QSPI_STATUS_UNITIF_Pos (1)
940#define QSPI_STATUS_UNITIF_Msk (0x1ul << QSPI_STATUS_UNITIF_Pos)
942#define QSPI_STATUS_SSACTIF_Pos (2)
943#define QSPI_STATUS_SSACTIF_Msk (0x1ul << QSPI_STATUS_SSACTIF_Pos)
945#define QSPI_STATUS_SSINAIF_Pos (3)
946#define QSPI_STATUS_SSINAIF_Msk (0x1ul << QSPI_STATUS_SSINAIF_Pos)
948#define QSPI_STATUS_SSLINE_Pos (4)
949#define QSPI_STATUS_SSLINE_Msk (0x1ul << QSPI_STATUS_SSLINE_Pos)
951#define QSPI_STATUS_SLVTOIF_Pos (5)
952#define QSPI_STATUS_SLVTOIF_Msk (0x1ul << QSPI_STATUS_SLVTOIF_Pos)
954#define QSPI_STATUS_SLVBEIF_Pos (6)
955#define QSPI_STATUS_SLVBEIF_Msk (0x1ul << QSPI_STATUS_SLVBEIF_Pos)
957#define QSPI_STATUS_SLVURIF_Pos (7)
958#define QSPI_STATUS_SLVURIF_Msk (0x1ul << QSPI_STATUS_SLVURIF_Pos)
960#define QSPI_STATUS_RXEMPTY_Pos (8)
961#define QSPI_STATUS_RXEMPTY_Msk (0x1ul << QSPI_STATUS_RXEMPTY_Pos)
963#define QSPI_STATUS_RXFULL_Pos (9)
964#define QSPI_STATUS_RXFULL_Msk (0x1ul << QSPI_STATUS_RXFULL_Pos)
966#define QSPI_STATUS_RXTHIF_Pos (10)
967#define QSPI_STATUS_RXTHIF_Msk (0x1ul << QSPI_STATUS_RXTHIF_Pos)
969#define QSPI_STATUS_RXOVIF_Pos (11)
970#define QSPI_STATUS_RXOVIF_Msk (0x1ul << QSPI_STATUS_RXOVIF_Pos)
972#define QSPI_STATUS_RXTOIF_Pos (12)
973#define QSPI_STATUS_RXTOIF_Msk (0x1ul << QSPI_STATUS_RXTOIF_Pos)
975#define QSPI_STATUS_QSPIENSTS_Pos (15)
976#define QSPI_STATUS_QSPIENSTS_Msk (0x1ul << QSPI_STATUS_QSPIENSTS_Pos)
978#define QSPI_STATUS_TXEMPTY_Pos (16)
979#define QSPI_STATUS_TXEMPTY_Msk (0x1ul << QSPI_STATUS_TXEMPTY_Pos)
981#define QSPI_STATUS_TXFULL_Pos (17)
982#define QSPI_STATUS_TXFULL_Msk (0x1ul << QSPI_STATUS_TXFULL_Pos)
984#define QSPI_STATUS_TXTHIF_Pos (18)
985#define QSPI_STATUS_TXTHIF_Msk (0x1ul << QSPI_STATUS_TXTHIF_Pos)
987#define QSPI_STATUS_TXUFIF_Pos (19)
988#define QSPI_STATUS_TXUFIF_Msk (0x1ul << QSPI_STATUS_TXUFIF_Pos)
990#define QSPI_STATUS_TXRXRST_Pos (23)
991#define QSPI_STATUS_TXRXRST_Msk (0x1ul << QSPI_STATUS_TXRXRST_Pos)
993#define QSPI_STATUS_RXCNT_Pos (24)
994#define QSPI_STATUS_RXCNT_Msk (0xful << QSPI_STATUS_RXCNT_Pos)
996#define QSPI_STATUS_TXCNT_Pos (28)
997#define QSPI_STATUS_TXCNT_Msk (0xful << QSPI_STATUS_TXCNT_Pos)
999#define QSPI_TX_TX_Pos (0)
1000#define QSPI_TX_TX_Msk (0xfffffffful << QSPI_TX_TX_Pos)
1002#define QSPI_RX_RX_Pos (0)
1003#define QSPI_RX_RX_Msk (0xfffffffful << QSPI_RX_RX_Pos) /* QSPI_CONST */ /* end of QSPI register group */ /* end of REGISTER group */
1009
1010#if defined ( __CC_ARM )
1011#pragma no_anon_unions
1012#endif
1013
1014#endif /* __QSPI_REG_H__ */
__IO uint32_t STATUS
Definition: qspi_reg.h:790
__IO uint32_t SSCTL
Definition: qspi_reg.h:787
__IO uint32_t FIFOCTL
Definition: qspi_reg.h:789
__I uint32_t RX
Definition: qspi_reg.h:798
__IO uint32_t PDMACTL
Definition: qspi_reg.h:788
__O uint32_t TX
Definition: qspi_reg.h:794
__IO uint32_t CTL
Definition: qspi_reg.h:785
__IO uint32_t CLKDIV
Definition: qspi_reg.h:786