M480 BSP V3.05.006
The Board Support Package for M480 Series
otg_reg.h
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1/**************************************************************************/
9#ifndef __OTG_REG_H__
10#define __OTG_REG_H__
11
12#if defined ( __CC_ARM )
13#pragma anon_unions
14#endif
15
26typedef struct
27{
28
29
523 __IO uint32_t CTL;
524 __IO uint32_t PHYCTL;
525 __IO uint32_t INTEN;
526 __IO uint32_t INTSTS;
527 __I uint32_t STATUS;
529} OTG_T;
530
531
537#define OTG_CTL_VBUSDROP_Pos (0)
538#define OTG_CTL_VBUSDROP_Msk (0x1ul << OTG_CTL_VBUSDROP_Pos)
540#define OTG_CTL_BUSREQ_Pos (1)
541#define OTG_CTL_BUSREQ_Msk (0x1ul << OTG_CTL_BUSREQ_Pos)
543#define OTG_CTL_HNPREQEN_Pos (2)
544#define OTG_CTL_HNPREQEN_Msk (0x1ul << OTG_CTL_HNPREQEN_Pos)
546#define OTG_CTL_OTGEN_Pos (4)
547#define OTG_CTL_OTGEN_Msk (0x1ul << OTG_CTL_OTGEN_Pos)
549#define OTG_CTL_WKEN_Pos (5)
550#define OTG_CTL_WKEN_Msk (0x1ul << OTG_CTL_WKEN_Pos)
552#define OTG_PHYCTL_OTGPHYEN_Pos (0)
553#define OTG_PHYCTL_OTGPHYEN_Msk (0x1ul << OTG_PHYCTL_OTGPHYEN_Pos)
555#define OTG_PHYCTL_IDDETEN_Pos (1)
556#define OTG_PHYCTL_IDDETEN_Msk (0x1ul << OTG_PHYCTL_IDDETEN_Pos)
558#define OTG_PHYCTL_VBENPOL_Pos (4)
559#define OTG_PHYCTL_VBENPOL_Msk (0x1ul << OTG_PHYCTL_VBENPOL_Pos)
561#define OTG_PHYCTL_VBSTSPOL_Pos (5)
562#define OTG_PHYCTL_VBSTSPOL_Msk (0x1ul << OTG_PHYCTL_VBSTSPOL_Pos)
564#define OTG_INTEN_ROLECHGIEN_Pos (0)
565#define OTG_INTEN_ROLECHGIEN_Msk (0x1ul << OTG_INTEN_ROLECHGIEN_Pos)
567#define OTG_INTEN_VBEIEN_Pos (1)
568#define OTG_INTEN_VBEIEN_Msk (0x1ul << OTG_INTEN_VBEIEN_Pos)
570#define OTG_INTEN_SRPFIEN_Pos (2)
571#define OTG_INTEN_SRPFIEN_Msk (0x1ul << OTG_INTEN_SRPFIEN_Pos)
573#define OTG_INTEN_HNPFIEN_Pos (3)
574#define OTG_INTEN_HNPFIEN_Msk (0x1ul << OTG_INTEN_HNPFIEN_Pos)
576#define OTG_INTEN_GOIDLEIEN_Pos (4)
577#define OTG_INTEN_GOIDLEIEN_Msk (0x1ul << OTG_INTEN_GOIDLEIEN_Pos)
579#define OTG_INTEN_IDCHGIEN_Pos (5)
580#define OTG_INTEN_IDCHGIEN_Msk (0x1ul << OTG_INTEN_IDCHGIEN_Pos)
582#define OTG_INTEN_PDEVIEN_Pos (6)
583#define OTG_INTEN_PDEVIEN_Msk (0x1ul << OTG_INTEN_PDEVIEN_Pos)
585#define OTG_INTEN_HOSTIEN_Pos (7)
586#define OTG_INTEN_HOSTIEN_Msk (0x1ul << OTG_INTEN_HOSTIEN_Pos)
588#define OTG_INTEN_BVLDCHGIEN_Pos (8)
589#define OTG_INTEN_BVLDCHGIEN_Msk (0x1ul << OTG_INTEN_BVLDCHGIEN_Pos)
591#define OTG_INTEN_AVLDCHGIEN_Pos (9)
592#define OTG_INTEN_AVLDCHGIEN_Msk (0x1ul << OTG_INTEN_AVLDCHGIEN_Pos)
594#define OTG_INTEN_VBCHGIEN_Pos (10)
595#define OTG_INTEN_VBCHGIEN_Msk (0x1ul << OTG_INTEN_VBCHGIEN_Pos)
597#define OTG_INTEN_SECHGIEN_Pos (11)
598#define OTG_INTEN_SECHGIEN_Msk (0x1ul << OTG_INTEN_SECHGIEN_Pos)
600#define OTG_INTEN_SRPDETIEN_Pos (13)
601#define OTG_INTEN_SRPDETIEN_Msk (0x1ul << OTG_INTEN_SRPDETIEN_Pos)
603#define OTG_INTSTS_ROLECHGIF_Pos (0)
604#define OTG_INTSTS_ROLECHGIF_Msk (0x1ul << OTG_INTSTS_ROLECHGIF_Pos)
606#define OTG_INTSTS_VBEIF_Pos (1)
607#define OTG_INTSTS_VBEIF_Msk (0x1ul << OTG_INTSTS_VBEIF_Pos)
609#define OTG_INTSTS_SRPFIF_Pos (2)
610#define OTG_INTSTS_SRPFIF_Msk (0x1ul << OTG_INTSTS_SRPFIF_Pos)
612#define OTG_INTSTS_HNPFIF_Pos (3)
613#define OTG_INTSTS_HNPFIF_Msk (0x1ul << OTG_INTSTS_HNPFIF_Pos)
615#define OTG_INTSTS_GOIDLEIF_Pos (4)
616#define OTG_INTSTS_GOIDLEIF_Msk (0x1ul << OTG_INTSTS_GOIDLEIF_Pos)
618#define OTG_INTSTS_IDCHGIF_Pos (5)
619#define OTG_INTSTS_IDCHGIF_Msk (0x1ul << OTG_INTSTS_IDCHGIF_Pos)
621#define OTG_INTSTS_PDEVIF_Pos (6)
622#define OTG_INTSTS_PDEVIF_Msk (0x1ul << OTG_INTSTS_PDEVIF_Pos)
624#define OTG_INTSTS_HOSTIF_Pos (7)
625#define OTG_INTSTS_HOSTIF_Msk (0x1ul << OTG_INTSTS_HOSTIF_Pos)
627#define OTG_INTSTS_BVLDCHGIF_Pos (8)
628#define OTG_INTSTS_BVLDCHGIF_Msk (0x1ul << OTG_INTSTS_BVLDCHGIF_Pos)
630#define OTG_INTSTS_AVLDCHGIF_Pos (9)
631#define OTG_INTSTS_AVLDCHGIF_Msk (0x1ul << OTG_INTSTS_AVLDCHGIF_Pos)
633#define OTG_INTSTS_VBCHGIF_Pos (10)
634#define OTG_INTSTS_VBCHGIF_Msk (0x1ul << OTG_INTSTS_VBCHGIF_Pos)
636#define OTG_INTSTS_SECHGIF_Pos (11)
637#define OTG_INTSTS_SECHGIF_Msk (0x1ul << OTG_INTSTS_SECHGIF_Pos)
639#define OTG_INTSTS_SRPDETIF_Pos (13)
640#define OTG_INTSTS_SRPDETIF_Msk (0x1ul << OTG_INTSTS_SRPDETIF_Pos)
642#define OTG_STATUS_OVERCUR_Pos (0)
643#define OTG_STATUS_OVERCUR_Msk (0x1ul << OTG_STATUS_OVERCUR_Pos)
645#define OTG_STATUS_IDSTS_Pos (1)
646#define OTG_STATUS_IDSTS_Msk (0x1ul << OTG_STATUS_IDSTS_Pos)
648#define OTG_STATUS_SESSEND_Pos (2)
649#define OTG_STATUS_SESSEND_Msk (0x1ul << OTG_STATUS_SESSEND_Pos)
651#define OTG_STATUS_BVLD_Pos (3)
652#define OTG_STATUS_BVLD_Msk (0x1ul << OTG_STATUS_BVLD_Pos)
654#define OTG_STATUS_AVLD_Pos (4)
655#define OTG_STATUS_AVLD_Msk (0x1ul << OTG_STATUS_AVLD_Pos)
657#define OTG_STATUS_VBUSVLD_Pos (5)
658#define OTG_STATUS_VBUSVLD_Msk (0x1ul << OTG_STATUS_VBUSVLD_Pos)
660#define OTG_STATUS_ASPERI_Pos (6)
661#define OTG_STATUS_ASPERI_Msk (0x1ul << OTG_STATUS_ASPERI_Pos)
663#define OTG_STATUS_ASHOST_Pos (7)
664#define OTG_STATUS_ASHOST_Msk (0x1ul << OTG_STATUS_ASHOST_Pos) /* OTG_CONST */ /* end of OTG register group */ /* end of REGISTER group */
669
670#if defined ( __CC_ARM )
671#pragma no_anon_unions
672#endif
673
674#endif /* __OTG_REG_H__ */
Definition: otg_reg.h:27
__I uint32_t STATUS
Definition: otg_reg.h:527
__IO uint32_t INTSTS
Definition: otg_reg.h:526
__IO uint32_t INTEN
Definition: otg_reg.h:525
__IO uint32_t CTL
Definition: otg_reg.h:523
__IO uint32_t PHYCTL
Definition: otg_reg.h:524