30#define USPI_MODE_0 (0x0 << USPI_PROTCTL_SCLKMODE_Pos)
31#define USPI_MODE_1 (0x1 << USPI_PROTCTL_SCLKMODE_Pos)
32#define USPI_MODE_2 (0x2 << USPI_PROTCTL_SCLKMODE_Pos)
33#define USPI_MODE_3 (0x3 << USPI_PROTCTL_SCLKMODE_Pos)
35#define USPI_SLAVE (USPI_PROTCTL_SLAVE_Msk)
36#define USPI_MASTER (0x0ul)
38#define USPI_SS (USPI_PROTCTL_SS_Msk)
39#define USPI_SS_ACTIVE_HIGH (0x0ul)
40#define USPI_SS_ACTIVE_LOW (USPI_LINECTL_CTLOINV_Msk)
43#define USPI_SSINACT_INT_MASK (0x001ul)
44#define USPI_SSACT_INT_MASK (0x002ul)
45#define USPI_SLVTO_INT_MASK (0x004ul)
46#define USPI_SLVBE_INT_MASK (0x008ul)
47#define USPI_TXUDR_INT_MASK (0x010ul)
48#define USPI_RXOV_INT_MASK (0x020ul)
49#define USPI_TXST_INT_MASK (0x040ul)
50#define USPI_TXEND_INT_MASK (0x080ul)
51#define USPI_RXST_INT_MASK (0x100ul)
52#define USPI_RXEND_INT_MASK (0x200ul)
55#define USPI_BUSY_MASK (0x01ul)
56#define USPI_RX_EMPTY_MASK (0x02ul)
57#define USPI_RX_FULL_MASK (0x04ul)
58#define USPI_TX_EMPTY_MASK (0x08ul)
59#define USPI_TX_FULL_MASK (0x10ul)
60#define USPI_SSLINE_STS_MASK (0x20ul)
75#define USPI_DISABLE_3WIRE_MODE(uspi) ( (uspi)->PROTCTL &= ~USPI_PROTCTL_SLV3WIRE_Msk )
83#define USPI_ENABLE_3WIRE_MODE(uspi) ( (uspi)->PROTCTL |= USPI_PROTCTL_SLV3WIRE_Msk )
93#define USPI_GET_RX_EMPTY_FLAG(uspi) ( ((uspi)->BUFSTS & USPI_BUFSTS_RXEMPTY_Msk) == USPI_BUFSTS_RXEMPTY_Msk ? 1:0 )
103#define USPI_GET_TX_EMPTY_FLAG(uspi) ( ((uspi)->BUFSTS & USPI_BUFSTS_TXEMPTY_Msk) == USPI_BUFSTS_TXEMPTY_Msk ? 1:0 )
113#define USPI_GET_TX_FULL_FLAG(uspi) ( ((uspi)->BUFSTS & USPI_BUFSTS_TXFULL_Msk) == USPI_BUFSTS_TXFULL_Msk ? 1:0 )
121#define USPI_READ_RX(uspi) ((uspi)->RXDAT)
130#define USPI_WRITE_TX(uspi, u32TxData) ( (uspi)->TXDAT = (u32TxData) )
139#define USPI_SET_SS_HIGH(uspi) \
141 (uspi)->LINECTL &= ~(USPI_LINECTL_CTLOINV_Msk); \
142 (uspi)->PROTCTL = ((uspi)->PROTCTL & ~(USPI_PROTCTL_AUTOSS_Msk | USPI_PROTCTL_SS_Msk)); \
152#define USPI_SET_SS_LOW(uspi) \
154 (uspi)->LINECTL |= (USPI_LINECTL_CTLOINV_Msk); \
155 (uspi)->PROTCTL = (((uspi)->PROTCTL & ~USPI_PROTCTL_AUTOSS_Msk) | USPI_PROTCTL_SS_Msk); \
165#define USPI_SET_SUSPEND_CYCLE(uspi, u32SuspCycle) ( (uspi)->PROTCTL = ((uspi)->PROTCTL & ~USPI_PROTCTL_SUSPITV_Msk) | ((u32SuspCycle) << USPI_PROTCTL_SUSPITV_Pos) )
173#define USPI_SET_LSB_FIRST(uspi) ( (uspi)->LINECTL |= USPI_LINECTL_LSB_Msk )
181#define USPI_SET_MSB_FIRST(uspi) ( (uspi)->LINECTL &= ~USPI_LINECTL_LSB_Msk )
190#define USPI_SET_DATA_WIDTH(uspi,u32Width) \
192 if((u32Width) == 16ul){ \
193 (uspi)->LINECTL = ((uspi)->LINECTL & ~USPI_LINECTL_DWIDTH_Msk) | (0 << USPI_LINECTL_DWIDTH_Pos); \
195 (uspi)->LINECTL = ((uspi)->LINECTL & ~USPI_LINECTL_DWIDTH_Msk) | ((u32Width) << USPI_LINECTL_DWIDTH_Pos); \
207#define USPI_IS_BUSY(uspi) ( ((uspi)->PROTSTS & USPI_PROTSTS_BUSY_Msk) == USPI_PROTSTS_BUSY_Msk ? 1:0 )
217#define USPI_GET_WAKEUP_FLAG(uspi) ( ((uspi)->WKSTS & USPI_WKSTS_WKF_Msk) == USPI_WKSTS_WKF_Msk ? 1:0)
225#define USPI_CLR_WAKEUP_FLAG(uspi) ( (uspi)->WKSTS |= USPI_WKSTS_WKF_Msk)
233#define USPI_GET_PROT_STATUS(uspi) ( (uspi)->PROTSTS)
250#define USPI_CLR_PROT_INT_FLAG(uspi,u32IntTypeFlag) ( (uspi)->PROTSTS = (u32IntTypeFlag))
258#define USPI_GET_BUF_STATUS(uspi) ( (uspi)->BUFSTS)
269#define USPI_CLR_BUF_INT_FLAG(uspi,u32IntTypeFlag) ( (uspi)->BUFSTS = (u32IntTypeFlag))
282#define USPI_ENABLE_PROT_INT(uspi, u32IntSel) ((uspi)->PROTIEN |= (u32IntSel))
295#define USPI_DISABLE_PROT_INT(uspi, u32IntSel) ((uspi)->PROTIEN &= ~ (u32IntSel))
306#define USPI_ENABLE_BUF_INT(uspi, u32IntSel) ((uspi)->BUFCTL |= (u32IntSel))
317#define USPI_DISABLE_BUF_INT(uspi, u32IntSel) ((uspi)->BUFCTL &= ~ (u32IntSel))
330#define USPI_ENABLE_TRANS_INT(uspi, u32IntSel) ((uspi)->INTEN |= (u32IntSel))
343#define USPI_DISABLE_TRANS_INT(uspi, u32IntSel) ((uspi)->INTEN &= ~ (u32IntSel))
353#define USPI_TRIGGER_RX_PDMA(uspi) ((uspi)->PDMACTL |= USPI_PDMACTL_RXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
362#define USPI_TRIGGER_TX_PDMA(uspi) ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
371#define USPI_TRIGGER_TX_RX_PDMA(uspi) ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_RXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
380#define USPI_DISABLE_RX_PDMA(uspi) ( (uspi)->PDMACTL &= ~USPI_PDMACTL_RXPDMAEN_Msk )
389#define USPI_DISABLE_TX_PDMA(uspi) ( (uspi)->PDMACTL &= ~USPI_PDMACTL_TXPDMAEN_Msk )
398#define USPI_DISABLE_TX_RX_PDMA(uspi) ( (uspi)->PDMACTL &= ~(USPI_PDMACTL_TXPDMAEN_Msk | USPI_PDMACTL_RXPDMAEN_Msk))
400uint32_t
USPI_Open(
USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock);
void USPI_Close(USPI_T *uspi)
Disable USCI_SPI function mode.
void USPI_ClearIntFlag(USPI_T *uspi, uint32_t u32Mask)
Clear interrupt flag.
void USPI_EnableInt(USPI_T *uspi, uint32_t u32Mask)
Enable related interrupts specified by u32Mask parameter.
uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make USCI_SPI module be ready to transfer. By default, the USCI_SPI transfer sequence i...
uint32_t USPI_GetBusClock(USPI_T *uspi)
Get the actual frequency of USCI_SPI bus clock. Only available in Master mode.
void USPI_DisableAutoSS(USPI_T *uspi)
Disable the automatic slave select function.
void USPI_EnableAutoSS(USPI_T *uspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave select function. Only available in Master mode.
uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
Set the USCI_SPI bus clock. Only available in Master mode.
void USPI_EnableWakeup(USPI_T *uspi)
Enable USCI_SPI Wake-up Function.
void USPI_DisableWakeup(USPI_T *uspi)
Disable USCI_SPI Wake-up Function.
void USPI_DisableInt(USPI_T *uspi, uint32_t u32Mask)
Disable related interrupts specified by u32Mask parameter.
void USPI_ClearTxBuf(USPI_T *uspi)
Clear Tx buffer.
uint32_t USPI_GetIntFlag(USPI_T *uspi, uint32_t u32Mask)
Get interrupt flag.
uint32_t USPI_GetStatus(USPI_T *uspi, uint32_t u32Mask)
Get USCI_SPI status.
void USPI_ClearRxBuf(USPI_T *uspi)
Clear Rx buffer.