37#define PDMA_OP_STOP 0x00000000UL
38#define PDMA_OP_BASIC 0x00000001UL
39#define PDMA_OP_SCATTER 0x00000002UL
44#define PDMA_WIDTH_8 0x00000000UL
45#define PDMA_WIDTH_16 0x00001000UL
46#define PDMA_WIDTH_32 0x00002000UL
51#define PDMA_SAR_INC 0x00000000UL
52#define PDMA_SAR_FIX 0x00000300UL
53#define PDMA_DAR_INC 0x00000000UL
54#define PDMA_DAR_FIX 0x00000C00UL
59#define PDMA_REQ_SINGLE 0x00000004UL
60#define PDMA_REQ_BURST 0x00000000UL
62#define PDMA_BURST_128 0x00000000UL
63#define PDMA_BURST_64 0x00000010UL
64#define PDMA_BURST_32 0x00000020UL
65#define PDMA_BURST_16 0x00000030UL
66#define PDMA_BURST_8 0x00000040UL
67#define PDMA_BURST_4 0x00000050UL
68#define PDMA_BURST_2 0x00000060UL
69#define PDMA_BURST_1 0x00000070UL
74#define PDMA_SPI0_TX 0x00000000UL
75#define PDMA_SPI1_TX 0x00000001UL
76#define PDMA_SPI2_TX 0x00000002UL
77#define PDMA_SPI3_TX 0x00000003UL
78#define PDMA_UART0_TX 0x00000004UL
79#define PDMA_UART1_TX 0x00000005UL
80#define PDMA_UART2_TX 0x00000006UL
81#define PDMA_UART3_TX 0x00000007UL
82#define PDMA_UART4_TX 0x00000008UL
83#define PDMA_UART5_TX 0x00000009UL
84#define PDMA_I2S0_TX 0x0000000BUL
85#define PDMA_I2S1_TX 0x0000000CUL
86#define PDMA_SPI0_RX 0x0000000DUL
87#define PDMA_SPI1_RX 0x0000000EUL
88#define PDMA_SPI2_RX 0x0000000FUL
89#define PDMA_SPI3_RX 0x00000010UL
90#define PDMA_UART0_RX 0x00000011UL
91#define PDMA_UART1_RX 0x00000012UL
92#define PDMA_UART2_RX 0x00000013UL
93#define PDMA_UART3_RX 0x00000014UL
94#define PDMA_UART4_RX 0x00000015UL
95#define PDMA_UART5_RX 0x00000016UL
96#define PDMA_ADC 0x00000018UL
97#define PDMA_I2S0_RX 0x00000019UL
98#define PDMA_I2S1_RX 0x0000001AUL
99#define PDMA_MEM 0x0000001FUL
117#define PDMA_GET_INT_STATUS() ((uint32_t)(PDMA->INTSTS))
129#define PDMA_GET_TD_STS() ((uint32_t)(PDMA->TDSTS))
141#define PDMA_CLR_TD_FLAG(u32Mask) ((uint32_t)(PDMA->TDSTS = u32Mask))
153#define PDMA_GET_ABORT_STS() ((uint32_t)(PDMA->ABTSTS))
165#define PDMA_CLR_ABORT_FLAG(u32Mask) ((uint32_t)(PDMA->ABTSTS = u32Mask))
177#define PDMA_GET_EMPTY_STS() ((uint32_t)(PDMA->SCATSTS))
189#define PDMA_CLR_EMPTY_FLAG(u32Mask) ((uint32_t)(PDMA->SCATSTS = u32Mask))
202#define PDMA_IS_CH_BUSY(u32Ch) ((uint32_t)(PDMA->TRGSTS & (1 << u32Ch))? 1 : 0)
215#define PDMA_SET_SRC_ADDR(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[u32Ch].ENDSA = u32Addr))
228#define PDMA_SET_DST_ADDR(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[u32Ch].ENDDA = u32Addr))
241#define PDMA_SET_TRANS_CNT(u32Ch, u32Count) ((uint32_t)(PDMA->DSCT[u32Ch].CTL=(PDMA->DSCT[u32Ch].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|((u32Count-1) << PDMA_DSCT_CTL_TXCNT_Pos))
254#define PDMA_SET_SCATTER_DESC(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[u32Ch].NEXT = u32Addr - (PDMA->SCATBA)))
266#define PDMA_STOP(u32Ch) ((uint32_t)(PDMA->STOP = (1 << u32Ch)))
273void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
274void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Periphral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
275void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
Set PDMA Transfer Address.
void PDMA_Trigger(uint32_t u32Ch)
Trigger PDMA.
void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
Enable Interrupt.
void PDMA_Open(uint32_t u32Mask)
PDMA Open.
void PDMA_Close(void)
PDMA Close.
void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
Disable Interrupt.
void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Periphral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
Set PDMA Transfer Mode.
void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
Set PDMA Burst Type.
void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
Set PDMA Transfer Count.