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NANO103 BSP V3.01.004
The Board Support Package for Nano103 Series
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Modules | |
PDMA Exported Functions | |
Macros | |
#define | PDMA_WIDTH_8 0x00080000UL |
#define | PDMA_WIDTH_16 0x00100000UL |
#define | PDMA_WIDTH_32 0x00000000UL |
#define | PDMA_SAR_INC 0x00000000UL |
#define | PDMA_SAR_FIX 0x00000020UL |
#define | PDMA_SAR_WRA 0x00000030UL |
#define | PDMA_DAR_INC 0x00000000UL |
#define | PDMA_DAR_FIX 0x00000080UL |
#define | PDMA_DAR_WRA 0x000000C0UL |
#define | PDMA_SPI0_TX 0x00000000UL |
#define | PDMA_SPI1_TX 0x00000001UL |
#define | PDMA_UART0_TX 0x00000002UL |
#define | PDMA_UART1_TX 0x00000003UL |
#define | PDMA_SPI3_TX 0x00000005UL |
#define | PDMA_SPI2_TX 0x00000008UL |
#define | PDMA_TMR0 0x00000009UL |
#define | PDMA_TMR1 0x0000000AUL |
#define | PDMA_TMR2 0x0000000BUL |
#define | PDMA_TMR3 0x0000000CUL |
#define | PDMA_SPI0_RX 0x00000010UL |
#define | PDMA_SPI1_RX 0x00000011UL |
#define | PDMA_UART0_RX 0x00000012UL |
#define | PDMA_UART1_RX 0x00000013UL |
#define | PDMA_SPI3_RX 0x00000015UL |
#define | PDMA_ADC 0x00000016UL |
#define | PDMA_SPI2_RX 0x00000018UL |
#define | PDMA_MEM 0x0000001FUL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW8 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW9 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW10 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW11 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW12 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW13 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW14 0x00000000UL |
#define | PDMA_TOC_TPSC_HCLK_DIV_2POW15 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW10 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW11 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW12 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW13 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW14 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW15 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW8 0x00000000UL |
#define PDMA_TOC_TPSC_HCLK_DIV_2POW9 0x00000000UL |