NANO103 BSP V3.01.004
The Board Support Package for Nano103 Series
sc.c
Go to the documentation of this file.
1/**************************************************************************/
12#include "Nano103.h"
13
14// Below are variables used locally by SC driver and does not want to parse by Doxygen unless HIDDEN_SYMBOLS is defined
16static uint32_t u32CardStateIgnore[SC_INTERFACE_NUM] = {0, 0};
17
19
41{
42 // put conditions into two variable to remove IAR compilation warning
43 uint32_t cond1 = ((sc->PINCTL & SC_PINCTL_CDPINSTS_Msk) >> SC_PINCTL_CDPINSTS_Pos);
44 uint32_t cond2 = ((sc->PINCTL & SC_PINCTL_CDLV_Msk) >> SC_PINCTL_CDLV_Pos);
45
46 if(sc == SC0 && u32CardStateIgnore[0] == 1)
47 return TRUE;
48 else if(sc == SC1 && u32CardStateIgnore[1] == 1)
49 return TRUE;
50 else if(cond1 != cond2)
51 return FALSE;
52 else
53 return TRUE;
54}
55
62{
64}
65
71void SC_Close(SC_T *sc)
72{
73 sc->INTEN = 0;
74 sc->PINCTL = 0;
75 sc->ALTCTL = 0;
76 sc->CTL = 0;
77}
78
91void SC_Open(SC_T *sc, uint32_t u32CD, uint32_t u32PWR)
92{
93 uint32_t u32Reg = 0, u32Intf;
94
95 sc->CTL = SC_CTL_SCEN_Msk;
96 if(sc == SC0)
97 u32Intf = 0;
98 else
99 u32Intf = 1;
100
101 if(u32CD != SC_PIN_STATE_IGNORE)
102 {
103 u32Reg = u32CD ? 0: SC_PINCTL_CDLV_Msk;
104 u32CardStateIgnore[u32Intf] = 0;
105 }
106 else
107 {
108 u32CardStateIgnore[u32Intf] = 1;
109 }
110 u32Reg |= u32PWR ? 0 : SC_PINCTL_PWRINV_Msk;
111 sc->PINCTL = u32Reg;
112 //sc->CTL = SC_CTL_SCEN_Msk;
113}
114
121{
122 uint32_t u32Intf;
123
124 if(sc == SC0)
125 u32Intf = 0;
126 else
127 u32Intf = 1;
128
129 // Reset FIFO
131 // Set Rx trigger level to 1 character, longest card detect debounce period, disable error retry (EMV ATR does not use error retry)
132 sc->CTL &= ~(SC_CTL_RXTRGLV_Msk |
138 // Enable auto convention, and all three smartcard internal timers
140 // Disable Rx timeout
141 sc->RXTOUT = 0;
142 // 372 clocks per ETU by default
143 sc->ETUCTL = 371;
144 // Enable auto de-activation while card removal
146
147 /* Enable necessary interrupt for smartcard operation */
148 if(u32CardStateIgnore[u32Intf]) // Do not enable card detect interrupt if card present state ignore
156 else
165
166 return;
167}
168
175void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
176{
177 sc->CTL = (sc->CTL & ~SC_CTL_BGT_Msk) | ((u32BGT - 1) << SC_CTL_BGT_Pos);
178}
179
186void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
187{
188 u32CGT -= sc->CTL & SC_CTL_NSB_Msk ? 11: 12;
189 sc->EGT = u32CGT;
190}
191
199{
201}
202
224void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
225{
226 uint32_t reg = u32Mode | (SC_TMRCTL0_CNT_Msk & (u32ETUCount - 1));
227
228 if(u32TimerNum == 0)
229 {
230 sc->TMRCTL0 = reg;
232 }
233 else if(u32TimerNum == 1)
234 {
235 sc->TMRCTL1 = reg;
237 }
238 else // timer 2
239 {
240 sc->TMRCTL2 = reg;
242 }
243}
244
252void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
253{
254 if(u32TimerNum == 0)
255 sc->ALTCTL &= ~SC_ALTCTL_CNTEN0_Msk;
256 else if(u32TimerNum == 1)
257 sc->ALTCTL &= ~SC_ALTCTL_CNTEN1_Msk;
258 else // timer 2
259 sc->ALTCTL &= ~SC_ALTCTL_CNTEN2_Msk;
260}
261
268{
269 uint32_t reg, freq;
270
271 if(sc == (SC_T *)SC0)
272 {
274 }
275 else
276 {
278 }
279
281 {
282 freq = __HXT;
283 }
285 {
286 freq = CLK_GetPLLClockFreq();
287 }
289 {
290 if(CLK->CLKSEL0 & CLK_CLKSEL0_HIRCSEL_Msk)
291 {
292 freq = __HIRC36M;
293 }
294 else
295 {
296 freq = __HIRC12M;
297 }
298 }
300 {
301 freq = __MIRC;
302 }
303 else
304 freq = SystemCoreClock;
305
306 if(sc == (SC_T *)SC0)
307 {
308 freq /= (((CLK->CLKDIV0 & CLK_CLKDIV0_SC0DIV_Msk) >> (CLK_CLKDIV0_SC0DIV_Pos)) + 1);
309 }
310 else
311 {
312 freq /= (((CLK->CLKDIV1 & CLK_CLKDIV1_SC1DIV_Msk) >> (CLK_CLKDIV1_SC1DIV_Pos)) + 1);
313 }
314 return (freq /1000);
315}
316 /* end of group NANO103_SC_EXPORTED_FUNCTIONS */
318 /* end of group NANO103_SC_Driver */
320 /* end of group NANO103_Device_Driver */
322
323/*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
NANO103 peripheral access layer header file. This file contains all the peripheral register's definit...
#define SC_INTEN_TMR2IEN_Msk
Definition: Nano103.h:11925
#define SC_INTEN_ACERRIEN_Msk
Definition: Nano103.h:11940
#define SC_INTEN_CDIEN_Msk
Definition: Nano103.h:11931
#define SC_PINCTL_PWRINV_Msk
Definition: Nano103.h:12054
#define SC_CTL_TXRTYEN_Msk
Definition: Nano103.h:11850
#define SC_CTL_RXRTYEN_Msk
Definition: Nano103.h:11844
#define SC_PINCTL_ADACEN_Msk
Definition: Nano103.h:12045
#define SC_INTEN_TMR1IEN_Msk
Definition: Nano103.h:11922
#define SC_CTL_NSB_Msk
Definition: Nano103.h:11838
#define SC_ALTCTL_CNTEN1_Msk
Definition: Nano103.h:11877
#define SC_INTEN_TMR0IEN_Msk
Definition: Nano103.h:11919
#define SC_CTL_CDDBSEL_Msk
Definition: Nano103.h:11853
#define SC_PINCTL_CDPINSTS_Msk
Definition: Nano103.h:12039
#define SC_CTL_TMRSEL_Msk
Definition: Nano103.h:11835
#define SC_ALTCTL_CNTEN2_Msk
Definition: Nano103.h:11880
#define SC_CTL_BGT_Pos
Definition: Nano103.h:11831
#define SC_INTEN_BGTIEN_Msk
Definition: Nano103.h:11928
#define SC_CTL_SCEN_Msk
Definition: Nano103.h:11814
#define SC_PINCTL_CDPINSTS_Pos
Definition: Nano103.h:12038
#define SC_INTEN_RDAIEN_Msk
Definition: Nano103.h:11910
#define SC_ALTCTL_TXRST_Msk
Definition: Nano103.h:11859
#define SC_PINCTL_CDLV_Pos
Definition: Nano103.h:12050
#define SC_TMRCTL0_CNT_Msk
Definition: Nano103.h:12063
#define SC_ALTCTL_CNTEN0_Msk
Definition: Nano103.h:11874
#define SC_ALTCTL_RXRST_Msk
Definition: Nano103.h:11862
#define SC_CTL_RXTRGLV_Msk
Definition: Nano103.h:11829
#define SC_CTL_RXRTY_Msk
Definition: Nano103.h:11841
#define SC_INTEN_TERRIEN_Msk
Definition: Nano103.h:11916
#define SC_CTL_AUTOCEN_Msk
Definition: Nano103.h:11823
#define SC_PINCTL_CDLV_Msk
Definition: Nano103.h:12051
#define SC_CTL_TXRTY_Msk
Definition: Nano103.h:11847
#define CLK_CLKSEL2_SC0SEL_HXT
Definition: clk.h:214
#define CLK_CLKSEL2_SC0SEL_PLL
Definition: clk.h:215
#define CLK_CLKSEL2_SC0SEL_HIRC
Definition: clk.h:216
#define CLK_CLKSEL2_SC0SEL_MIRC
Definition: clk.h:217
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
Definition: clk.c:177
#define CLK_CLKSEL2_SC1SEL_Pos
Definition: Nano103.h:2843
#define CLK_CLKDIV1_SC1DIV_Pos
Definition: Nano103.h:2867
#define CLK_CLKDIV0_SC0DIV_Msk
Definition: Nano103.h:2865
#define CLK_CLKSEL2_SC0SEL_Msk
Definition: Nano103.h:2841
#define CLK_CLKSEL2_SC1SEL_Msk
Definition: Nano103.h:2844
#define CLK_CLKSEL2_SC0SEL_Pos
Definition: Nano103.h:2840
#define CLK_CLKDIV1_SC1DIV_Msk
Definition: Nano103.h:2868
#define CLK_CLKDIV0_SC0DIV_Pos
Definition: Nano103.h:2864
#define CLK_CLKSEL0_HIRCSEL_Msk
Definition: Nano103.h:2796
#define CLK
Pointer to CLK register structure.
Definition: Nano103.h:13802
#define SC1
Pointer to SC1 register structure.
Definition: Nano103.h:13798
#define SC0
Pointer to SC0 register structure.
Definition: Nano103.h:13797
#define SC_INTERFACE_NUM
Definition: sc.h:32
#define SC_PIN_STATE_IGNORE
Definition: sc.h:35
void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
This function block guard time (BGT) of specified smartcard module.
Definition: sc.c:175
void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
This function character guard time (CGT) of specified smartcard module.
Definition: sc.c:186
void SC_ResetReader(SC_T *sc)
This function reset specified smartcard module to its default state for activate smartcard.
Definition: sc.c:120
void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR)
This function initialized smartcard module.
Definition: sc.c:91
void SC_StopAllTimer(SC_T *sc)
This function stop all smartcard timer of specified smartcard module.
Definition: sc.c:198
uint32_t SC_GetInterfaceClock(SC_T *sc)
This function gets smartcard clock frequency.
Definition: sc.c:267
uint32_t SC_IsCardInserted(SC_T *sc)
This function indicates specified smartcard slot status.
Definition: sc.c:40
void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
This function stop a smartcard timer of specified smartcard module.
Definition: sc.c:252
void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
This function configure and start a smartcard timer of specified smartcard module.
Definition: sc.c:224
void SC_ClearFIFO(SC_T *sc)
This function reset both transmit and receive FIFO of specified smartcard module.
Definition: sc.c:61
void SC_Close(SC_T *sc)
This function disable specified smartcard module.
Definition: sc.c:71
__IO uint32_t TMRCTL2
Definition: Nano103.h:11796
__IO uint32_t ALTCTL
Definition: Nano103.h:11786
__IO uint32_t ETUCTL
Definition: Nano103.h:11789
__IO uint32_t INTEN
Definition: Nano103.h:11790
__IO uint32_t CTL
Definition: Nano103.h:11785
__IO uint32_t PINCTL
Definition: Nano103.h:11793
__IO uint32_t TMRCTL0
Definition: Nano103.h:11794
__IO uint32_t TMRCTL1
Definition: Nano103.h:11795
#define TRUE
Boolean true, define to use in API parameters or return value.
Definition: Nano103.h:13966
#define FALSE
Boolean false, define to use in API parameters or return value.
Definition: Nano103.h:13967
__IO uint32_t RXTOUT
Definition: Nano103.h:11788
__IO uint32_t EGT
Definition: Nano103.h:11787
#define __HXT
uint32_t SystemCoreClock
#define __HIRC36M
#define __HIRC12M
#define __MIRC