Nano102_112 Series BSP  V3.03.002
The Board Support Package for Nano102_112 Series
Data Fields
SYS_T Struct Reference

#include <Nano1X2Series.h>

Data Fields

__I uint32_t PDID
 
__IO uint32_t RST_SRC
 
__IO uint32_t IPRST_CTL1
 
__IO uint32_t IPRST_CTL2
 
uint32_t RESERVE0 [4]
 
__IO uint32_t TEMPCTL
 
uint32_t RESERVE1 [3]
 
__IO uint32_t PA_L_MFP
 
__IO uint32_t PA_H_MFP
 
__IO uint32_t PB_L_MFP
 
__IO uint32_t PB_H_MFP
 
__IO uint32_t PC_L_MFP
 
__IO uint32_t PC_H_MFP
 
__IO uint32_t PD_L_MFP
 
__IO uint32_t PD_H_MFP
 
__IO uint32_t PE_L_MFP
 
__IO uint32_t PE_H_MFP
 
__IO uint32_t PF_L_MFP
 
uint32_t RESERVE2 [1]
 
__IO uint32_t PORCTL
 
__IO uint32_t BODCTL
 
__IO uint32_t BODSTS
 
__IO uint32_t Int_VREFCTL
 
__IO uint32_t LDO_CTL
 
uint32_t RESERVE3 [3]
 
__IO uint32_t IRCTRIMCTL
 
__IO uint32_t IRCTRIMIEN
 
__IO uint32_t IRCTRIMINT
 
uint32_t RESERVE4 [29]
 
__IO uint32_t RegLockAddr
 

Detailed Description

@addtogroup SYS System Global Control Registers(SYS)
Memory Mapped Structure for SYS Controller

Definition at line 2677 of file Nano1X2Series.h.

Field Documentation

◆ BODCTL

__IO uint32_t SYS_T::BODCTL

BODCTL

Offset: 0x64 Brown-out Detector Controller Register

Bits Field Descriptions
[0] BOD17_EN Brown-Out Detector 1.7V Function Enable Control
This is a protected register. Please refer to open lock sequence to program it.
The default value is set by flash controller user configuration register config0 bit[20:19]
Users can disable BOD17_EN but it takes effective (disabled) only in Power-down mode.
Once existing Power-down mode, BOD17 will be enabled by HW automatically.
When CPU reads this bit, CPU will read whether BOD17 function enabled or not.
In other words,CPU will always read high.
0 = Brown-out Detector 1.7V function Disabled.
1 = Brown-out Detector 1.7V function Enabled.
[1] BOD20_EN Brown-Out Detector 2.0 V Function Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Brown-out Detector 2.0 V function Disabled.
1 = Brown-out Detector 2.0 V function Enabled.
BOD20_EN is default on.
If SW disables it, Brown-out Detector 2.0 V function is not disabled until chip enters power-down mode.
If system is not in power-down mode, BOD20_EN will be enabled by hardware automatically.
[2] BOD25_EN Brown-Out Detector 2.5 V Function Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Brown-out Detector 2.5 V function Disabled.
1 = Brown-out Detector 2.5 V function Enabled.
[4] BOD17_RST_EN BOD 1.7 V Reset Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Reset does not issue when BOD17 occurs.
1 = Reset issues when BOD17 occurs.
The default value is set by flash controller user configuration register config0 bit[20:19]
[5] BOD20_RST_EN BOD 2.0 V Reset Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Reset does not issue when BOD20 occurs.
1 = Reset issues when BOD20 occurs.
The default value is set by flash controller user configuration register config0 bit[20:19]
[6] BOD25_RST_EN BOD 2.5 V Reset Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Reset does not issue when BOD25 occurs.
1 = Reset issues when BOD25 occurs.
The default value is set by flash controller user configuration register config0 bit[20:19]
[8] BOD17_INT_EN BOD 1.7 V Interrupt Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Interrupt does not issue when BOD17 occurs.
1 = Interrupt issues when BOD17 occurs.
[9] BOD20_INT_EN BOD 2.0 V Interrupt Enable Control
0 = Interrupt does not issue when BOD20 occurs.
1 = Interrupt issues when BOD20 occurs.
[10] BOD25_INT_EN BOD 2.5 V Interrupt Enable Control
This is a protected register. Please refer to open lock sequence to program it.
0 = Interrupt does not issue when BOD25 occurs.
1 = Interrupt issues when BOD25 occurs.
[15:12] BOD17_TRIM BOD 1.7 TRIM Value
This is a protected register. Please refer to open lock sequence to program it.
This value is used to control BOD17 detect voltage level, nominal 1.7 V.
Higher trim value, higher detection voltage.
[19:16] BOD20_TRIM BOD 2.0 TRIM Value
This is a protected register. Please refer to open lock sequence to program it.
This value is used to control BOD20 detect voltage level, nominal 2.0 V.
Higher trim value, higher detection voltage.
[23:20] BOD25_TRIM BOD 2.5 TRIM Value
This is a protected register. Please refer to open lock sequence to program it.
This value is used to control BOD25 detect voltage level, nominal 2.5 V.
Higher trim value, higher detection voltage.

Definition at line 3406 of file Nano1X2Series.h.

◆ BODSTS

__IO uint32_t SYS_T::BODSTS

BODSTS

Offset: 0x68 Brown-out Detector Status Register

Bits Field Descriptions
[0] BOD_INT Brown-Out Detector Interrupt Status
0 = Brown-out Detector does not detect any voltage drift at VDD down through or up through the target detected voltage after interrupt is enabled.
1 = When Brown-out Detector detects the VDD is dropped down through the target detected voltage or the VDD is raised up through the target detected voltage and Brown-out interrupt is enabled, this bit will be set to 1.
This bit is cleared by writing 1 to it.
[1] BOD17_drop Brown-Out Detector Lower Than 1.7V Status
Setting BOD17_drop high means once the detected voltage is lower than target detected voltage setting (1.7V).
Software can write 1 to clear BOD17_drop.
[2] BOD20_drop Brown-Out Detector Lower Than 2.0V Status
Setting BOD20_drop high means once the detected voltage is lower than target detected voltage setting (2.0V).
Software can write 1 to clear BOD20_drop.
[3] BOD25_drop Brown-Out Detector Lower Than 2.5V Status
Setting BOD25_drop high means once the detected voltage is lower than target detected voltage setting (2.5V).
Software can write 1 to clear BOD25_drop.
[4] BOD17_rise Brown-Out Detector Higher Than 1.7V Status
Setting BOD17_rise high means once the detected voltage is higher than target detected voltage setting (1.7V).
Software can write 1 to clear BOD17_rise.
[5] BOD20_rise Brown-Out Detector Higher Than 2.0V Status
Setting BOD20_rise high means once the detected voltage is higher than target detected voltage setting (2.0V).
Software can write 1 to clear BOD20_rise.
[6] BOD25_rise Brown-Out Detector Higher Than 2.5V Status
Setting BOD25_rise high means once the detected voltage is higher than target detected voltage setting (2.5V).
Software can write 1 to clear BOD25_rise.
[8] BOD17 Brown-Out Detector 1.7V Status
This bit reflects the BOD17 status.
BOD17 is high if detected voltage is higher than 1.7 V.
BOD17 is low if detected voltage is lower than 1.7 V.
Note: This bit is ready-only.
[9] BOD20 Brown-Out Detector 2.0V Status
This bit reflects the BOD20 status.
BOD20 is high if detected voltage is higher than 2.0 V.
BOD20 is low if detected voltage is lower than 2.0 V.
Note: This bit is ready-only.
[10] BOD25 Brown-Out Detector 2.5V Status
This bit reflects the BOD25 status.
BOD25 is high if detected voltage is higher than 2.5 V.
BOD25 is low if detected voltage is lower than 2.5 V.
Note: This bit is ready-only.

Definition at line 3453 of file Nano1X2Series.h.

◆ Int_VREFCTL

__IO uint32_t SYS_T::Int_VREFCTL

Int_VREFCTL

Offset: 0x6C Internal Voltage Reference Control Register

Bits Field Descriptions
[0] BGP_EN Band-Gap Enable Control
This is a protected register. Please refer to open lock sequence to program it.
Band-gap is the reference voltage of internal reference voltage.
User must enable band-gap if want to enable internal 1.5, 1.8V or 2.5V reference voltage.
0 = Disabled.
1 = Enabled.
[1] REG_EN Regulator Enable Control
Enable internal 1.5, 1.8V or 2.5V reference voltage.
This is a protected register. Please refer to open lock sequence to program it.
0 = Disabled.
1 = Enabled.
[3:2] SEL25 Regulator Output Voltage Selection
Select internal reference voltage level.
This is a protected register. Please refer to open lock sequence to program it.
00 = 1.5V.
01 = 1.8V.
10 = 2.5V.
11 = 2.5V.
[4] EXT_MODE Regulator External Mode
This is a protected register. Please refer to open lock sequence to program it.
Users can output regulator output voltage in VREF pin if EXT_MODE is high.
0 = No connection with external VREF pin.
1 = Connect to external VREF pin.
Connect a 1uF to 10uF capacitor to AVSS will let internal voltage reference be more stable.
[11:8] VREF_TRIM Internal Voltage Reference Trim

Definition at line 3488 of file Nano1X2Series.h.

◆ IPRST_CTL1

__IO uint32_t SYS_T::IPRST_CTL1

IPRST_CTL1

Offset: 0x08 Peripheral Reset Control Resister1

Bits Field Descriptions
[0] CHIP_RST Chip One-Shot Reset
This is a protected register. Please refer to open lock sequence to program it.
Setting this bit will reset the whole chip, including Cortex-M0 core and all peripherals like power-on reset and this bit will automatically return to "0" after the 2 clock cycles.
The chip setting from flash will be also reloaded when chip one shot reset.
0 = Normal.
1 = Reset chip.
Note: In the following conditions, chip setting from flash will be reloaded.
Power-on Reset
Brown-out-Detected Reset
Low level on the nRESET pin
Set IPRST_CTL1[CHIP_RST]
[1] CPU_RST Cortex-M0 Core One-Shot Reset
This is a protected register. Please refer to open lock sequence to program it.
Setting this bit will only reset the Cortex-M0 core and Flash Memory Controller (FMC), and this bit will automatically return to "0" after the 2 clock cycles
0 = Normal.
1 = Reset Cortex-M0 core.
[2] DMA_RST DMA Controller Reset
This is a protected register. Please refer to open lock sequence to program it.
Set this bit "1" will generate a reset signal to the DMA.
SW needs to set this bit to low to release reset signal.
0 = Normal operation.
1 = DMA IP reset.

Definition at line 2758 of file Nano1X2Series.h.

◆ IPRST_CTL2

__IO uint32_t SYS_T::IPRST_CTL2

IPRST_CTL2

Offset: 0x0C Peripheral Reset Control Resister2

Bits Field Descriptions
[1] GPIO_RST GPIO Controller Reset
0 = GPIO module normal operation.
1 = GPIO module reset.
[2] TMR0_RST Timer0 Controller Reset
0 = Timer0 module normal operation.
1 = Timer0 module reset.
[3] TMR1_RST Timer1 Controller Reset
0 = Timer1 module normal operation.
1 = Timer1 module reset.
[4] TMR2_RST Timer2 Controller Reset
0 = Timer2 module normal operation.
1 = Timer2 module reset.
[5] TMR3_RST Timer3 Controller Reset
0 = Timer3 module normal operation.
1 = Timer3 module reset.
[8] I2C0_RST I2C0 Controller Reset
0 = I2C0 module normal operation.
1 = I2C0 module reset.
[9] I2C1_RST I2C1 Controller Reset
0 = I2C1 module normal operation.
1 = I2C1 module reset.
[12] SPI0_RST SPI0 Controller Reset
0 = SPI0 module normal operation.
1 = SPI0 module reset.
[13] SPI1_RST SPI1 Controller Reset
0 = SPI1 module normal operation.
1 = SPI1 module reset.
[16] UART0_RST UART0 Controller Reset
0 = UART0 module normal operation.
1 = UART0 module reset.
[17] UART1_RST UART1 Controller Reset
0 = UART1 module normal operation.
1 = UART1 module reset.
[20] PWM0_RST PWM0 Controller Reset
0 = PWM0 module normal operation.
1 = PWM0 module reset.
[22] ACMP01_RST Comparator Controller Reset
0 = Comparator module normal operation.
1 = Comparator module reset.
[26] LCD_RST LCD Controller Reset
0 = LCD module normal operation.
1 = LCD module reset.
[28] ADC_RST ADC Controller Reset
0 = ADC module normal operation.
1 = ADC module reset.
[30] SC0_RST SmartCard 0 Controller Reset
0 = SmartCard module normal operation.
1 = SmartCard module reset.
[31] SC1_RST SmartCard1 Controller Reset
0 = SmartCard module normal operation.
1 = SmartCard module reset.

Definition at line 2819 of file Nano1X2Series.h.

◆ IRCTRIMCTL

__IO uint32_t SYS_T::IRCTRIMCTL

IRCTRIMCTL

Offset: 0x80 HIRC Trim Control Register

Bits Field Descriptions
[1:0] TRIM_SEL Trim Frequency Selection
This field indicates the target frequency of HIRC auto trim.
If no any target frequency is selected (TRIM_SEL is 00), the HIRC auto trim function is disabled.
During auto trim operation, if 32.768 kHz clock error detected or trim retry limitation count reached, this field will be cleared to 00 automatically.
00 = Disable HIRC auto trim function
01 = Enable HIRC auto trim function and trim HIRC to 11.0592 MHz
10 = Enable HIRC auto trim function and trim HIRC to 12 MHz
11 = Enable HIRC auto trim function and trim HIRC to 16 MHz
[5:4] TRIM_LOOP Trim Calculation Loop
This field defines that trim value calculation is based on how many 32.768 kHz clock.
00 = 4 x 32.768 kHz clock
01 = 8 x 32.768 kHz clock
10 = 16 x 32.768 kHz clock
11 = 32 x 32.768 kHz clock
[7:6] TRIM_RETRY_CNT Trim Value Update Limitation Count
This field defines that how many times the auto trim circuit will try to update the HIRC trim value before the frequency of HIRC locked.
Once the HIRC locked, the internal trim value update counter will be reset.
If the trim value update counter reached this limitation value and frequency of HIRC still doesn't lock, the auto trim operation will be disabled and TRIM_SEL will be cleared to 00.
00 = Trim retry count limitation is 64
01 = Trim retry count limitation is 128
10 = Trim retry count limitation is 256
11 = Trim retry count limitation is 512
[8] ERR_STOP Trim Stop When 32.768 KHz Error Detected
This bit is used to control if stop the HIRC trim operation when 32.768 kHz clock error is detected.
If set this bit high and 32.768 kHz clock error detected, the status 32K_ERR_INT would be set high and HIRC trim operation was stopped.
If this bit is low and 32.768 kHz clock error detected, the status 23K_ERR_INT would be set high and HIRC trim operation is continuously.
0 = Continue the HIRC trim operation even if 32.768 kHz clock error detected.
1 = Stop the HIRC trim operation if 32.768 kHz clock error detected.

Definition at line 3549 of file Nano1X2Series.h.

◆ IRCTRIMIEN

__IO uint32_t SYS_T::IRCTRIMIEN

IRCTRIMIEN

Offset: 0x84 HIRC Trim Interrupt Enable Register

Bits Field Descriptions
[1] TRIM_FAIL_IEN Trim Failure Interrupt Enable Control
This bit controls if an interrupt will be triggered while HIRC trim value update limitation count reached and HIRC frequency still not locked on target frequency set by TRIM_SEL.
If this bit is high and TRIM_FAIL_INT is set during auto trim operation, an interrupt will be triggered to notify that HIRC trim value update limitation count was reached.
0 = TRIM_FAIL_INT status Disabled to trigger an interrupt to CPU.
1 = TRIM_FAIL_INT status Enabled to trigger an interrupt to CPU.
[2] 32K_ERR_IEN 32.768 KHz Clock Error Interrupt Enable Control
This bit controls if CPU would get an interrupt while 32.768 kHz clock is inaccuracy during auto trim operation.
If this bit is high, and 32K_ERR_INT is set during auto trim operation, an interrupt will be triggered to notify the 32.768 kHz clock frequency is inaccuracy.
0 = 32K_ERR_INT status Disabled to trigger an interrupt to CPU.
1 = 32K_ERR_INT status Enabled to trigger an interrupt to CPU.

Definition at line 3569 of file Nano1X2Series.h.

◆ IRCTRIMINT

__IO uint32_t SYS_T::IRCTRIMINT

IRCTRIMINT

Offset: 0x88 HIRC Trim Interrupt Status Register

Bits Field Descriptions
[0] FREQ_LOCK HIRC Frequency Lock Status
This bit indicates the HIRC frequency lock.
This is a status bit and doesn't trigger any interrupt.
[1] TRIM_FAIL_INT Trim Failure Interrupt Status
This bit indicates that HIRC trim value update limitation count reached and HIRC clock frequency still doesn't lock.
Once this bit is set, the auto trim operation stopped and TRIM_SEL will be cleared to 00 by hardware automatically.
If this bit is set and TRIM_FAIL_IEN is high, an interrupt will be triggered to notify that HIRC trim value update limitation count was reached.
Write 1 to clear this to zero.
0 = Trim value update limitation count doesn't reach.
1 = Trim value update limitation count reached and HIRC frequency still doesn't lock.
[2] 32K_ERR_INT 32.768 KHz Clock Error Interrupt Status
This bit indicates that 32.768 kHz clock frequency is inaccuracy.
Once this bit is set, the auto trim operation stopped and TRIM_SEL will be cleared to 00 by hardware automatically.
If this bit is set and 32K_ERR_IEN is high, an interrupt will be triggered to notify the 32.768 kHz clock frequency is inaccuracy.
Write 1 to clear this to zero.
0 = 32.768 kHz clock frequency is accuracy.
1 = 32.768 kHz clock frequency is inaccuracy.

Definition at line 3596 of file Nano1X2Series.h.

◆ LDO_CTL

__IO uint32_t SYS_T::LDO_CTL

LDO_CTL

Offset: 0x70 LDO Control Register

Bits Field Descriptions
[0] LDO_PD LDO Power Off
This is a protected register. Please refer to open lock sequence to program it.
Set this bit high will off LDO and cause Chip in unexpected state. User must keep this bit low.
0 = LDO Enabled.
1 = LDO Disabled.
[3:2] LDO_LEVEL LDO Output Voltage Select
This is a protected register. Please refer to open lock sequence to program it.
00 = Reserved.
01 = 1.6V.
10 = 1.8V.
11 = 1.8V.

Definition at line 3509 of file Nano1X2Series.h.

◆ PA_H_MFP

__IO uint32_t SYS_T::PA_H_MFP

PA_H_MFP

Offset: 0x34 Port A High Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PA8_MFP PA.8 Pin Function Selection
0000 = GPIOA[8]
0100 = SmartCard0 Power pin
[7:4] PA9_MFP PA.9 Pin Function Selection
0000 = GPIOA[9]
0100 = SmartCard0 RST pin
[11:8] PA10_MFP PA.10 Pin Function Selection
0000 = GPIOA[10]
0100 = SmartCard0 CLK pin
[15:12] PA11_MFP PA.11 Pin Function Selection
0000 = GPIOA[11]
0010 = ADC external trigger input.
0100 = SmartCard0 DATA pin(SC0_UART_RXD)
[18:16] PA12_MFP PA.12 Pin Function Selection
0000 = GPIOA[12]
0011 = Comparator1 P-end input
0101 = I2C 0 clock pin
0110 = SPI1 1st MOSI (Master Out, Slave In) pin
0111 = UART0 Data transmitter output pin(This pin could modulate with PWM0 output. Please refer PWM_SEL(UARTx_CTL[26:24])).
1000 = LCD segment output 19 at 48-pin package
[22:20] PA13_MFP PA.13 Pin Function Selection
0000 = GPIOA[13]
0011 = Comparator1 N-end input
0101 = I2C0 data I/O pin
0110 = SPI1 1st MISO (Master In, Slave Out) pin
0111 = UART0 Data receiver input pin
1000 = LCD segment output 18 at 48-pin package
[26:24] PA14_MFP PA.14 Pin Function Selection
0000 = GPIOA[14]
0101 = I2C1 clock pin
0110 = SPI1 serial clock pin
1000 = LCD segment output 17 at 48-pin package, LCD segment output 31 at 64-pin package
1001 = Comparator0 charge/discharge path
[31:28] PA15_MFP PA.15 Pin Function Selection
0000 = GPIOA[15]
0010 = Timer3 capture input
0011 = Comparator1 output
0101 = I2C1 data I/O pin
0110 = SPI1 1st slave select pin
1000 = LCD segment output 16 at 48-pin package, LCD segment output 30 at 64-pin package

Definition at line 2941 of file Nano1X2Series.h.

◆ PA_L_MFP

__IO uint32_t SYS_T::PA_L_MFP

PA_L_MFP

Offset: 0x30 Port A Low Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PA0_MFP PA.0 Pin Function Selection
0000 = GPIOA[0]
0010 = ADC input channel 0
[6:4] PA1_MFP PA.1 Pin Function Selection
0000 = GPIOA[1]
0010 = ADC analog input1
0011 = Comparator0 P-end input3
1001 = Comparator0 charge/discharge path
[11:8] PA2_MFP PA.2 Pin Function Selection
0000 = GPIOA[2]
0001 = External interrupt0 input pin
0010 = ADC analog input2
0011 = Comparator0 P-end input2
0100 = SmartCard0 clock pin(SC0_UART_TXD)
1001 = Comparator0 charge/discharge path
[14:12] PA3_MFP PA.3 Pin Function Selection
0000 = GPIOA[3]
0001 = External interrupt 1
0010 = ADC analog input3
0011 = Comparator0 P-end input1
0100 = SmartCard0 DATA pin(SC0_UART_RXD)
1001 = Comparator0 charge/discharge path
[19:16] PA4_MFP PA.4 Pin Function Selection
0000 = GPIOA[4]
0010 = ADC analog input4
0011 = Comparator0 P-end input0
0100 = SmartCard0 card detect pin
1001 = Comparator0 charge/discharge path
[23:20] PA5_MFP PA.5 Pin Function Selection
0000 = GPIOA[5]
0010 = ADC analog input5
0011 = Comparator0 N-end input0
0100 = SmartCard0 Power pin
0101 = I2C1 data I/O pin
0110 = SPI1 1st slave select pin
1001 = Comparator0 charge/discharge path
[27:24] PA6_MFP PA.6 Pin Function Selection
0000 = GPIOA[6]
0010 = ADC analog input6
0011 = Comparator0 output
0100 = SmartCard0 RST pin
1001 = Comparator0 charge/discharge path
[31:28] PA7_MFP PA.7 Pin Function Selection
0000 = GPIOA[7]
0010 = ADC input channel 7
0100 = SmartCard1 card detect

Definition at line 2891 of file Nano1X2Series.h.

◆ PB_H_MFP

__IO uint32_t SYS_T::PB_H_MFP

PB_H_MFP

Offset: 0x3C Port B High Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PB8_MFP PB.8 Pin Function Selection
0000 = GPIOB[8]
0001 = External interrupt1 input pin
0010 = Timer0 external counter input or Timer0 toggle out.
0011 = PWM0 Channel0 output
0100 = Snooper pin
1000 = LCD segment output 32 at 100-pin package
[7:4] PB9_MFP PB.9 Pin Function Selection
0000 = GPIOB[9]
0011 = PWM0 Channel1 output
1000 = LCD segment output 31 at 100-pin package
[11:8] PB10_MFP PB.10 Pin Function Selection
0000 = GPIOB[10]
0110 = SPI0 2nd MOSI (Master Out, Slave In) pin
0111 = UART1 Data receiver input pin
1000 = LCD segment output 24 at 64-pin package, LCD segment output 28 at 100-pin package
[15:12] PB11_MFP PB.11 Pin Function Selection
0000 = GPIOB[11]
0010 = Timer1 external counter input or Timer1 toggle out
0110 = SPI0 2nd MISO (Master In, Slave Out) pin
0111 = UART1 Request to Send output pin
1000 = LCD segment output 23 at 64-pin package, LCD segment output 27 at 100-pin package
[19:16] PB12_MFP PB.12 Pin Function Selection
0000 = GPIOB[12]
0001 = Frequency Divider0 output pin
0010 = Timer0 external counter input or Timer0 toggle out.
0110 = SPI0 1st MOSI (Master Out, Slave In) pin
0111 = UART0 Request to Send output pin
1000 = LCD segment output 15 at 48-pin package, LCD segment output 22 at 64-pin package, LCD segment output 26 at 100-pin package
[23:20] PB13_MFP PB.13 Pin Function Selection
0000 = GPIOB[13]
0110 = SPI0 1st MISO (Master In, Slave Out) pin
0111 = UART0 Data receiver input pin
1000 = LCD segment output 14 at 48-pin package, LCD segment output 21 at 64-pin package, LCD segment output 25 at 100-pin package
[27:24] PB14_MFP PB.14 Pin Function Selection
0000 = GPIOB[14]
0110 = SPI0 serial clock pin
0111 = UART0 Data transmitter output pin(This pin could modulate with PWM0 output)
1000 = LCD segment output 13 at 48-pin package, LCD segment output 20 at 64-pin package, LCD segment output 24 at 100-pin package
[31:28] PB15_MFP PB.15 Pin Function Selection
0000 = GPIOB[15]
0110 = SPI0 1st slave select pin
0111 = UART0 Clear to Send input pin
1000 = LCD segment output 12 at 48-pin package, LCD segment output 19 at 64-pin package, LCD segment output 23 at 100-pin package

Definition at line 3050 of file Nano1X2Series.h.

◆ PB_L_MFP

__IO uint32_t SYS_T::PB_L_MFP

PB_L_MFP

Offset: 0x38 Port B Low Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PB0_MFP PB.0 Pin Function Selection
0000 = GPIOB[0]
0001 = Frequency Divider1 output pin
0111 = UART0 Data transmitter output pin(This pin could modulate with PWM0 output. Please refer PWM_SEL(UARTx_CTL[26:24])).
1000 = LCD segment output 29 at 64-pin package
[7:4] PB1_MFP PB.1 Pin Function Selection
0000 = GPIOB[1]
0001 = External interrupt1 input pin
0010 = Timer 2 capture input
0111 = UART0 Data receiver input pin
1000 = LCD segment output 28 at 64-pin package
[11:8] PB2_MFP PB.2 Pin Function Selection
0000 = GPIOB[2]
0010 = Timer3 external counter input
0101 = I2C0 clock pin
0110 = SPI1 2nd MOSI (Master Out, Slave In) pin
0111 = UART0 Request to Send output pin
1000 = LCD segment output 27 at 64-pin package
[15:12] PB3_MFP PB.3 Pin Function Selection
0000 = GPIOB[3]
0010 = Timer2 external counter input
0101 = I2C0 data I/O pin
0110 = SPI1 2nd MISO (Master In, Slave Out) pin
0111 = UART0 Clear to Send input pin
1000 = LCD segment output 26 at 64-pin package
[19:16] PB4_MFP PB.4 Pin Function Selection
0000 = GPIOB[4]
0110 = SPI1 2nd MISO (Master In, Slave Out) pin
0111 = UART1 Request to Send output pin
[23:20] PB5_MFP PB.5 Pin Function Selection
0000 = GPIOB[5]
0110 = SPI1 2nd MOSI (Master Out, Slave In) pin SmartCard0 RST
0111 = UART1 Data receiver input pin
1000 = LCD segment output 35 at 100-pin package
[27:24] PB6_MFP PB.6 Pin Function Selection
0000 = GPIOB[6]
0001 = Frequency Divider0 output pin
0110 = SPI1 2nd slave select pin
0111 = UART1 Data transmitter output pin(This pin could modulate with PWM0 output. Please refer PWM_SEL(UARTx_CTL[26:24])).
1000 = LCD segment output 25 at 64-pin package, LCD segment output 34 at 100-pin package
[31:28] PB7_MFP PB.7 Pin Function Selection
0000 = GPIOB[7]
0100 = SmartCard0 card detect
0111 = UART1 Clear to Send input pin
1000 = LCD segment output 33 at 100-pin package

Definition at line 2996 of file Nano1X2Series.h.

◆ PC_H_MFP

__IO uint32_t SYS_T::PC_H_MFP

PC_H_MFP

Offset: 0x44 Port C High Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PC8_MFP PC.8 Pin Function Selection
0000 = GPIOC[8]
0100 = SmartCard0 RST pin
0111 = UART1 Data transmitter output pin(This pin could modulate with PWM0 output. Please refer PWM_SEL(UARTx_CTL[26:24])).
1000 = LCD segment output 3 at 48-pin package, LCD segment output 10 at 64-pin package, LCD segment output 14 at 100-pin package
[7:4] PC9_MFP PC.9 Pin Function Selection
1000 = LCD segment output 2 at 48-pin package, LCD segment output 9 at 64-pin package, LCD segment output 13 at 100-pin package
0000 = GPIOC[9]
[11:8] PC10_MFP PC.10 Pin Function Selection
0000 = GPIOC[10]
0100 = SmartCard1 card detect
0101 = I2C1 clock pin
1000 = LCD segment output 12 at 100-pin package
[15:12] PC11_MFP PC.11 Pin Function Selection
0000 = GPIOC[11]
0100 = SmartCard1 PWR pin
0101 = I2C 1 data I/O pin
1000 = LCD segment output 11 at 100-pin package
[19:16] PC12_MFP PC.12 Pin Function Selection
0000 = GPIOC[12]
0100 = SmartCard1 clock pin(SC1_UART_TXD)
1000 = LCD segment output 10 at 100-pin package
[23:20] PC13_MFP PC.13 Pin Function Selection
0000 = GPIOC[13]
0100 = SmartCard1 DATA pin(SC1_UART_RXD)
1000 = LCD segment output 9 at 100-pin package
[27:24] PC14_MFP PC.14 Pin Function Selection
0000 = GPIOC[14]
0100 = SmartCard1 card detect
1000 = LCD segment output 1 at 48-pin package, LCD segment output 8 at 64-pin package, LCD segment output 8 at 100-pin package
[31:28] PC15_MFP PC.15 Pin Function Selection
0000 = GPIOC[15]
0100 = SmartCard1 PWR pin
1000 = LCD segment output 0 at 48-pin package, LCD segment output 7 at 64-pin package, LCD segment output 7 at 100-pin package

Definition at line 3145 of file Nano1X2Series.h.

◆ PC_L_MFP

__IO uint32_t SYS_T::PC_L_MFP

PC_L_MFP

Offset: 0x40 Port C Low Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PC0_MFP PC.0 Pin Function Selection
0000 = GPIOC[0]
0011 = PWM0 Channel0 output
0101 = I2C0 clock pin
0110 = SPI0 2nd slave select pin
1000 = LCD segment output 11 at 48-pin package, LCD segment output 18 at 64-pin package, LCD segment output 22 at 100-pin package
[7:4] PC1_MFP PC.1 Pin Function Selection
0000 = GPIOC[1]
0011 = PWM0 Channel1 output
0101 = I2C0 data I/O pin
1000 = LCD segment output 10 at 48-pin package, LCD segment output 17 at 64-pin package, LCD segment output 21 at 100-pin package
[11:8] PC2_MFP PC.2 Pin Function Selection
0000 = GPIOC[2]
0011 = PWM0 Channel2 output
0101 = I2C1 clock pin
1000 = LCD segment output 9 at 48-pin package, LCD segment output 16 at 64-pin package, LCD segment output 20 at 100-pin package
[15:12] PC3_MFP PC.3 Pin Function Selection
0000 = GPIOC[3]
0011 = PWM0 Channel3 output
0101 = I2C1 data I/O pin
1000 = LCD segment output 8 at 48-pin package, LCD segment output 15 at 64-pin package, LCD segment output 19 at 100-pin package
[19:16] PC4_MFP PC.4 Pin Function Selection
0000 = GPIOC[4]
0001 = External interrupt0 input pin
0100 = SmartCard0 clock pin(SC0_UART_TXD)
0111 = UART1 Clear to Send input pin
1000 = LCD segment output 7 at 48-pin package, LCD segment output 14 at 64-pin package, LCD segment output 18 at 100-pin package
[23:20] PC5_MFP PC.5 Pin Function Selection
0000 = GPIOC[5]
0100 = SmartCard0 card detect pin
1000 = LCD segment output 6 at 48-pin package, LCD segment output 13 at 64-pin package, LCD segment output 17 at 100-pin package
[27:24] PC6_MFP PC.6 Pin Function Selection
0000 = GPIOC[6]
0100 = SmartCard0 DATA pin(SC0_UART_RXD)
0111 = UART1 Request to Send output pin
1000 = LCD segment output 5 at 48-pin package, LCD segment output 12 at 64-pin package, LCD segment output 16 at 100-pin package
[31:28] PC7_MFP PC.7 Pin Function Selection
0000 = GPIOC[7]
0100 = SmartCard0 Power pin
0111 = UART1 Data receiver input pin
1000 = LCD segment output 4 at 48-pin package, LCD segment output 11 at 64-pin package, LCD segment output 15 at 100-pin package

Definition at line 3101 of file Nano1X2Series.h.

◆ PD_H_MFP

__IO uint32_t SYS_T::PD_H_MFP

PD_H_MFP

Offset: 0x4C Port D High Byte Multiple Function Control Register

Bits Field Descriptions
[2:0] PD8_MFP PD.8 Pin Function Selection
0000 = GPIOD[8]
0100 = SmartCard1 DATA pin(SC1_UART_RXD)
1000 = LCD common output 2 at 48-pin, LCD common output 2 at 64-pin package, LCD common output 2 at 100-pin package
[6:4] PD9_MFP PD.9 Pin Function Selection
0000 = GPIOD[9]
0011 = PWM0 Channel3 output
0100 = SmartCard1 RST pin
1000 = LCD common output 1 at 48-pin, LCD common output 1 at 64-pin package, LCD common output 1 at 100-pin package
[10:8] PD10_MFP PD.10 Pin Function Selection
0000 = GPIOD[10]
0010 = Timer1 capture input
0011 = PWM0 Channel2 output
1000 = LCD common output 0 at 48-pin, LCD common output 0 at 64-pin package, LCD common output 0 at 100-pin package
[14:12] PD11_MFP PD.11 Pin Function Selection
0000 = GPIOD[11]
0010 = Timer0 capture input
0011 = PWM0 Channel1 output
1000 = LCD external capacitor pin of charge pump circuit at 64-pin package, LCD external capacitor pin of charge pump circuit at 100-pin package
[18:16] PD12_MFP PD.12 Pin Function Selection
0000 = GPIOD[12]
0001 = Frequency Divider0 output pin
0010 = Timer1 external counter input or Timer1 toggle out
0011 = PWM0 Channel0 output
1000 = LCD external capacitor pin of charge pump circuit at 64-pin package, LCD external capacitor pin of charge pump circuit at 100-pin package
1001 = 1, 1/2, 1/4, 1/16 Hz clock output
[22:20] PD13_MFP PD.13 Pin Function Selection
0000 = GPIOD[13]
0001 = External interrupt 1 input pin
1000 = LCD Unit voltage for LCD charge pump circuit at 48-pin package, LCD Unit voltage for LCD charge pump circuit at 64-pin package, LCD Unit voltage for LCD charge pump circuit at 100-pin package
[27:24] PD14_MFP PD.14 Pin Function Selection
0000 = GPIOD[14]
1000 = LCD Unit voltage for LCD charge pump circuit at 48-pin package, LCD Unit voltage for LCD charge pump circuit at 64-pin package, LCD Unit voltage for LCD charge pump circuit at 100-pin package
[30:28] PD15_MFP PD.15 Pin Function Selection
0000 = GPIOD[15]
1000 = LCD Unit voltage for LCD charge pump circuit at 48-pin package, LCD Unit voltage for LCD charge pump circuit at 64-pin package, LCD Unit voltage for LCD charge pump circuit at 100-pin package

Definition at line 3227 of file Nano1X2Series.h.

◆ PD_L_MFP

__IO uint32_t SYS_T::PD_L_MFP

PD_L_MFP

Offset: 0x48 Port D Low Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PD0_MFP PD.0 Pin Function Selection
0000 = GPIOD[0]
1000 = LCD segment output 6 at 64-pin package, LCD segment output 6 at 100-pin package
[7:4] PD1_MFP PD.1 Pin Function Selection
0000 = GPIOD[1]
1000 = LCD segment output 5 at 64-pin package, LCD segment output 5 at 100-pin package
[11:8] PD2_MFP PD.2 Pin Function Selection
0000 = GPIOD[2]
1000 = LCD segment output 4 at 64-pin package, LCD segment output 4 at 100-pin package
[15:12] PD3_MFP PD.3 Pin Function Selection
0000 = GPIOD[3]
1000 = LCD segment output 3 at 64-pin package, LCD segment output 3 at 100-pin package
[19:16] PD4_MFP PD.4 Pin Function Selection
0000 = GPIOD[4]
0100 = SmartCard1 RST pin
1000 = LCD segment output 2 at 64-pin package, LCD segment output 2 at 100-pin package
[23:20] PD5_MFP PD.5 Pin Function Selection
0000 = GPIOD[5]
1000 = LCD segment output 1 at 64-pin package(or as LD_COM5), LCD segment output 1 at 100-pin package(or as LD_COM5)
[27:24] PD6_MFP PD.6 Pin Function Selection
0000 = GPIOD[6]
1000 = LCD segment output 0 at 64-pin package(or as LD_COM4), LCD segment output 0 at 100-pin package(or as LD_COM4)
[31:28] PD7_MFP PD.7 Pin Function Selection
0000 = GPIOD[7]
0100 = SmartCard1 clock pin(SC1_UART_TXD)
1000 = LCD common output 3 at 48-pin package, LCD common output 3 at 64-pin, LCD common output 3 at 100-pin package

Definition at line 3181 of file Nano1X2Series.h.

◆ PDID

__I uint32_t SYS_T::PDID

PDID

Offset: 0x00 Part Device Identification Number Register

Bits Field Descriptions
[31:0] PDID Part Device ID
This register reflects device part number code.
Software can read this register to identify which device is used.

Definition at line 2692 of file Nano1X2Series.h.

◆ PE_H_MFP

__IO uint32_t SYS_T::PE_H_MFP

PE_H_MFP

Offset: 0x54 Port E High Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PE8_MFP PE.8 Pin Function Selection
0000 = GPIOE[8]
0011 = PWM0 Channel2 output
1000 = LCD segment output 30 at 100-pin package
[7:4] PE9_MFP PE.9 Pin Function Selection
0000 = GPIOE[9]
0011 = PWM0 Channel3 output
1000 = LCD segment output 29 at 100-pin package

Definition at line 3279 of file Nano1X2Series.h.

◆ PE_L_MFP

__IO uint32_t SYS_T::PE_L_MFP

PE_L_MFP

Offset: 0x50 Port E Low Byte Multiple Function Control Register

Bits Field Descriptions
[2:0] PE0_MFP PE.0 Pin Function Selection
0000 = GPIOE[0]
0110 = SPI0 1st MOSI (Master Out, Slave In) pin
[6:4] PE1_MFP PE.1 Pin Function Selection
0000 = GPIOE[1]
0110 = SPI0 1st MISO (Master In, Slave Out) pin
[10:8] PE2_MFP PE.2 Pin Function Selection
0000 = GPIOE[2]
0110 = SPI0 serial clock pin
[15] PE3_MFP PE.3 Pin Function Selection
0000 = GPIOE[4]
0110 = SPI0 1st slave select pin
[18:16] PE4_MFP PE.4 Pin Function Selection
0000 = GPIOE[4]
0100 = SmartCard1 RST pin
[23:20] PE5_MFP PE.5 Pin Function Selection
0000 = GPIOE[5]
0100 = SmartCard1 PWR pin
[27:24] PE6_MFP PE.6 Pin Function Selection
0000 = GPIOE[6]
0100 = SmartCard1 clock pin(SC1_UART_TXD)
[31:28] PE7_MFP PE.7 Pin Function Selection
0000 = GPIOE[7]
0100 = SmartCard1 DATA pin(SC1_UART_RXD)

Definition at line 3261 of file Nano1X2Series.h.

◆ PF_L_MFP

__IO uint32_t SYS_T::PF_L_MFP

PF_L_MFP

Offset: 0x58 Port F Low Byte Multiple Function Control Register

Bits Field Descriptions
[3:0] PF0_MFP PF.0 Pin Function Selection
0000 = GPIOF[1]
0010 = Timer3 external counter input or Timer3 toggle out.
1111 = External 32.768 kHz crystal input pin(default)
[7:4] PF1_MFP PF.1 Pin Function Selection
0000 = GPIOF[1]
0010 = Timer2 external counter input or Timer2 toggle out.
1111 = External 32.768 kHz crystal output pin(default)
[11:8] PF2_MFP PF.2 Pin Function Selection
0000 = GPIOF[2]
0001 = External interrupt1 input pin
0010 = Timer3 capture input
0111 = UART1 Data receiver input pin
1111 = External 4~24 MHz crystal input pin(default)
[15:12] PF3_MFP PF.3 Pin Function Selection
0000 = GPIOF[3]
0001 = External interrupt0 input pin
0010 = Timer 2 capture input
0111 = UART1 Data transmitter output pin(This pin could modulate with PWM0 output. Please refer PWM_SEL(UARTx_CTL[26:24])).
1111 = External 4~24 MHz crystal output pin
[19:16] PF4_MFP PF.4 Pin Function Selection
0000 = GPIOF[4]
0001 = Frequency Divider1 output pin
0010 = Timer1 capture input
0011 = PWM0 Channel2 output
1001 = 1, 1/2, 1/4, 1/8, 1/16 Hz clock output
1111 = Serial Wired Debugger Clock pin
[23:20] PF5_MFP PF.5 Pin Function Selection
0000 = GPIOF[5]
0010 = Timer0 capture input
0011 = PWM0 Channel3 output
1001 = Comparator0 charge/discharge path
1111 = Serial Wired Debugger Data pin

Definition at line 3322 of file Nano1X2Series.h.

◆ PORCTL

__IO uint32_t SYS_T::PORCTL

PORCTL

Offset: 0x60 Power-On-Reset Controller Register

Bits Field Descriptions
[15:0] POR_DIS_CODE Power-On Reset Enable Control
This is a protected register. Please refer to open lock sequence to program it.
When powered on, the POR circuit generates a reset signal to reset the whole chip function, but noise on the power may cause the POR active again.
If setting the POR_DIS_CODE to 0x5AA5, the POR reset function will be disabled and the POR function will be active again when POR_DIS_CODE is set to another value or POR_DIS_CODE is reset by chip other reset functions, including: /RESET, Watchdog Timer reset, BOD reset, ICE reset command and the software-chip reset function.

Definition at line 3338 of file Nano1X2Series.h.

◆ RegLockAddr

__IO uint32_t SYS_T::RegLockAddr

RegLockAddr

Offset: 0x100 Register Lock Key address

Bits Field Descriptions
[0] RegUnLock Protected Register Enable Control
0 = Protected register are Locked. Any write to the target register is ignored.
1 = Protected registers are Unlocked.

Definition at line 3611 of file Nano1X2Series.h.

◆ RESERVE0

uint32_t SYS_T::RESERVE0[4]

Definition at line 2821 of file Nano1X2Series.h.

◆ RESERVE1

uint32_t SYS_T::RESERVE1[3]

Definition at line 2834 of file Nano1X2Series.h.

◆ RESERVE2

uint32_t SYS_T::RESERVE2[1]

Definition at line 3323 of file Nano1X2Series.h.

◆ RESERVE3

uint32_t SYS_T::RESERVE3[3]

Definition at line 3510 of file Nano1X2Series.h.

◆ RESERVE4

uint32_t SYS_T::RESERVE4[29]

Definition at line 3597 of file Nano1X2Series.h.

◆ RST_SRC

__IO uint32_t SYS_T::RST_SRC

RST_SRC

Offset: 0x04 System Reset Source Register

Bits Field Descriptions
[0] RSTS_POR The RSTS_POR Flag Is Set By The "Reset Signal" From The Power-On Reset (POR) Module Or Bit CHIP_RST (IPRSTC1[0]) To Indicate The Previous Reset Source
0 = No reset from POR or CHIP_RST.
1 = Power-on Reset (POR) or CHIP_RST had issued the reset signal to reset the system.
Note: This bit is cleared by writing 1 to it.
[1] RSTS_PAD The RSTS_PAD Flag Is Set By The "Reset Signal" From The /RESET Pin Or Power Related Reset Sources To Indicate The Previous Reset Source
0 = No reset from nRESET pin.
1 = The /RESET pin had issued the reset signal to reset the system.
Note: This bit is cleared by writing 1 to it.
[2] RSTS_WDT The RSTS_WDT Flag Is Set By The "Reset Signal" From The Watchdog Timer Module To Indicate The Previous Reset Source
0 = No reset from Watchdog Timer.
1 = The Watchdog Timer module had issued the reset signal to reset the system.
Note: This bit is cleared by writing 1 to it.
[4] RSTS_BOD The RSTS_BOD Flag Is Set By The "Reset Signal" From The Brown-Out-Detected Module To Indicate The Previous Reset Source
0 = No reset from BOD.
1 = Brown-out-Detected module had issued the reset signal to reset the system.
Note: This bit is cleared by writing 1 to it.
[5] RSTS_SYS The RSTS_SYS Flag Is Set By The "Reset Signal" From The Cortex_M0 Kernel To Indicate The Previous Reset Source
0 = No reset from Cortex_M0.
1 = Cortex_M0 had issued the reset signal to reset the system by writing 1 to the bit SYSRESTREQ(AIRCR[2], Application Interrupt and Reset Control Register) in system control registers of Cortex_M0 kernel.
Note: This bit is cleared by writing 1 to it.
[7] RSTS_CPU The RSTS_CPU Flag Is Set By Hardware If Software Writes CPU_RST (IPRST_CTL1[1]) "1" To Rest Cortex-M0 Core And Flash Memory Controller (FMC)
0 = No reset from CPU.
1 = Cortex-M0 core and FMC are reset by software setting CPU_RST to 1.
Note: This bit is cleared by writing 1 to it.

Definition at line 2726 of file Nano1X2Series.h.

◆ TEMPCTL

__IO uint32_t SYS_T::TEMPCTL

TEMPCTL

Offset: 0x20 Temperature Sensor Control Register

Bits Field Descriptions
[0] VTEMP_EN Temperature Sensor Enable Control
0 = Temperature sensor function Disabled (default).
1 = Temperature sensor function Enabled.

Definition at line 2833 of file Nano1X2Series.h.


The documentation for this struct was generated from the following file: