33#define ACMP_CR_CN_PIN (0<<24)
34#define ACMP_CR_CN_CRV (1<<24)
35#define ACMP_CR_CN_VREFI (2<<24)
36#define ACMP_CR_CN_AGND (3<<24)
38#define ACMP_CR_ACMP_HYSTERSIS_ENABLE ACMP_CR_ACMP_HYSEN_Msk
39#define ACMP_CR_ACMP_HYSTERSIS_DISABLE 0
41#define ACMP_CR_CPP0SEL_PA1 (3UL<<ACMP_CR_CPP0SEL_Pos)
42#define ACMP_CR_CPP0SEL_PA2 (2UL<<ACMP_CR_CPP0SEL_Pos)
43#define ACMP_CR_CPP0SEL_PA3 (1UL<<ACMP_CR_CPP0SEL_Pos)
44#define ACMP_CR_CPP0SEL_PA4 (0UL<<ACMP_CR_CPP0SEL_Pos)
47#define ACMP_MODCR0_TMR_TRI_LV_RISING (0UL<<ACMP_MODCR0_TMR_TRI_LV_Pos)
48#define ACMP_MODCR0_TMR_TRI_LV_FALLING (1UL<<ACMP_MODCR0_TMR_TRI_LV_Pos)
50#define ACMP_MODCR0_CH_DIS_PINSEL_PA1 (0UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
51#define ACMP_MODCR0_CH_DIS_PINSEL_PA2 (1UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
52#define ACMP_MODCR0_CH_DIS_PINSEL_PA3 (2UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
53#define ACMP_MODCR0_CH_DIS_PINSEL_PA4 (3UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
54#define ACMP_MODCR0_CH_DIS_PINSEL_PA5 (4UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
55#define ACMP_MODCR0_CH_DIS_PINSEL_PA6 (5UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
56#define ACMP_MODCR0_CH_DIS_PINSEL_PA14 (6UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
57#define ACMP_MODCR0_CH_DIS_PINSEL_PF5 (7UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
59#define ACMP_MODCR0_MOD_SEL_NORMAL (0UL<<ACMP_MODCR0_MOD_SEL_Pos)
60#define ACMP_MODCR0_MOD_SEL_SIGAMA_DELTA (1UL<<ACMP_MODCR0_MOD_SEL_Pos)
61#define ACMP_MODCR0_MOD_SEL_SLOPE (2UL<<ACMP_MODCR0_MOD_SEL_Pos)
63#define ACMP_TIMER01 (0UL<<ACMP_MODCR0_TMR_SEL_Pos)
64#define ACMP_TIMER23 (1UL<<ACMP_MODCR0_TMR_SEL_Pos)
85#define ACMP_SET_NEG_SRC(acmp,u32ChNum,u32Src) (acmp->CR[u32ChNum] = (acmp->CR[u32ChNum] & ~ACMP_CR_CN_Msk) | u32Src)
94#define ACMP_ENABLE_HYSTERESIS(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMP_HYSEN_Msk)
103#define ACMP_DISABLE_HYSTERESIS(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMP_HYSEN_Msk)
112#define ACMP_ENABLE_INT(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMPIE_Msk)
121#define ACMP_DISABLE_INT(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMPIE_Msk)
131#define ACMP_ENABLE(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMPEN_Msk)
140#define ACMP_DISABLE(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMPEN_Msk)
149#define ACMP_GET_OUTPUT(acmp,u32ChNum) ((acmp->SR & ACMP_SR_CO0_Msk<<u32ChNum)?1:0)
158#define ACMP_GET_INT_FLAG(acmp,u32ChNum) ((acmp->SR & ACMP_SR_ACMPF0_Msk<<u32ChNum)?1:0)
167#define ACMP_CLR_INT_FLAG(acmp,u32ChNum) (acmp->SR |= (ACMP_SR_ACMPF0_Msk<<u32ChNum))
176#define ACMP_ENABLE_WAKEUP(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMP_WKEUP_EN_Msk)
185#define ACMP_DISABLE_WAKEUP(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMP_WKEUP_EN_Msk)
196#define ACMP_CRV_SEL(u32Level) (ACMP->RVCR = (ACMP->RVCR & ~ACMP_RVCR_CRVS_Msk)| u32Level)
204#define ACMP_ENABLE_CRV(acmp) (ACMP->RVCR |= ACMP_RVCR_CRV_EN_Msk)
212#define ACMP_DISABLE_CRV(acmp) (ACMP->RVCR &= ~ACMP_RVCR_CRV_EN_Msk)
226#define ACMP_SELECT_P(acmp, u32ChNum, u32Src) ((acmp)->CR[(u32ChNum)%2] = ((acmp)->CR[(u32ChNum)%2] & ~ACMP_CR_CPP0SEL_Msk) | (u32Src))
234#define ACMP_START_CONV(acmp) \
236 ACMP->MODCR0 &= ~ACMP_MODCR0_START_Msk; \
237 ACMP->MODCR0 |= ACMP_MODCR0_START_Msk; \
240void ACMP_Open(
ACMP_T *, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn);
242void ACMP_SetSigmaDeltaConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin);
243void ACMP_SetSlopeConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin);
void ACMP_SetSigmaDeltaConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin)
This function configure ACMP to sigma-delta mode.
void ACMP_Close(ACMP_T *, uint32_t u32ChNum)
This function close comparator.
void ACMP_Open(ACMP_T *, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn)
This function open and configure comparator parameters.
void ACMP_SetSlopeConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin)
This function configure ACMP to slope mode.