35 CLK->APBCLK &= (~CLK_APBCLK_FDIV_EN_Msk);
64 CLK->CLKSEL2 = (
CLK->CLKSEL2 & (~CLK_CLKSEL2_FRQDIV_S_Msk)) | u32ClkSrc;
74 SCB->SCR = SCB_SCR_SLEEPDEEP_Msk;
144 uint32_t u32Freq =0, u32PLLSrc;
145 uint32_t u32NO, u32NR, u32IN_DV, u32PllReg;
147 u32PllReg =
CLK->PLLCTL;
162 else if (u32IN_DV == 1)
164 else if (u32IN_DV == 2)
206 CLK->PWRCTL &= ~CLK_PWRCTL_HIRC_EN_Msk;
235 CLK->CLKDIV0 = (
CLK->CLKDIV0 & ~CLK_CLKDIV0_HCLK_N_Msk) | u32ClkDiv;
236 CLK->CLKSEL0 = (
CLK->CLKSEL0 & ~CLK_CLKSEL0_HCLK_S_Msk) | u32ClkSrc;
241 CLK->PWRCTL &= ~CLK_CLKSTATUS_HIRC_STB_Msk;
341 uint32_t u32tmp=0,u32sel=0,u32div=0;
346 u32tmp = *(
volatile uint32_t *)(u32div);
348 *(
volatile uint32_t *)(u32div) = u32tmp;
354 u32tmp = *(
volatile uint32_t *)(u32sel);
356 *(
volatile uint32_t *)(u32sel) = u32tmp;
371 CLK->PWRCTL |= u32ClkMask;
396 CLK->PWRCTL &= ~u32ClkMask;
493 uint32_t u32ClkSrc,u32NR, u32NF,u32Register;
494 uint32_t u32NRTable[4]= {2,4,8,16};
514 u32NF = u32PllFreq / 1000000;
515 u32NR = u32ClkSrc / 1000000;
522 while( u32NR>16 || u32NF>(0x3F+32) )
528 for(i32NRVal=3; i32NRVal>=0; i32NRVal--)
529 if(u32NR==u32NRTable[i32NRVal])
break;
531 CLK->PLLCTL = u32Register | (i32NRVal<<8) | (u32NF - 32) ;
533 CLK->PLLCTL &= ~CLK_PLLCTL_PD_Msk;
565 SysTick->VAL = (0x00);
566 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
569 while (((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0) &&
571 if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0)
591 SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk;
594 SysTick->CTRL &= ~SysTick_CTRL_CLKSOURCE_Msk;
596 SysTick->LOAD = u32Count;
598 SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
627 int32_t i32TimeOutCnt;
629 i32TimeOutCnt =
__HSI / 20;
631 while((
CLK->CLKSTATUS & u32ClkMask) != u32ClkMask)
633 if(i32TimeOutCnt-- <= 0)
Nano100 series peripheral access layer header file. This file contains all the peripheral register's ...
#define CLK_CLKSEL0_STCLKSEL_HCLK
#define CLK_PLLCTL_PLL_SRC_HXT
#define CLK_PWRCTL_HXT_EN
#define MODULE_CLKSEL_Msk(x)
#define CLK_PLLCTL_OUT_DV
#define CLK_PLLCTL_PLL_SRC_HIRC
#define MODULE_CLKSEL_Pos(x)
#define CLK_HCLK_CLK_DIVIDER(x)
#define CLK_CLKSEL0_HCLK_S_PLL
#define MODULE_CLKDIV_Pos(x)
#define MODULE_IP_EN_Pos(x)
#define MODULE_CLKDIV_Msk(x)
#define CLK_PWRCTL_LXT_EN
#define CLK_CLKSEL0_HCLK_S_HIRC
void CLK_Idle(void)
This function let system enter to Idle mode.
void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function enable frequency divider module clock, enable frequency divider clock function and conf...
uint32_t CLK_GetHCLKFreq(void)
This function get HCLK frequency. The frequency unit is Hz.
uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq)
This function set PLL frequency.
void CLK_DisableCKO(void)
This function disable frequency output function.
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
This function enable module clock.
void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
This function disable module clock.
uint32_t CLK_WaitClockReady(uint32_t u32ClkMask)
This function check selected clock source status.
uint32_t CLK_GetLXTFreq(void)
This function get external low frequency crystal frequency. The frequency unit is Hz.
void CLK_PowerDown(void)
This function let system enter to Power-down mode.
void CLK_DisablePLL(void)
This function disable PLL.
uint32_t CLK_GetCPUFreq(void)
This function get CPU frequency. The frequency unit is Hz.
int32_t CLK_SysTickDelay(uint32_t us)
This function execute delay function.
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set HCLK clock source and HCLK clock divider.
void CLK_DisableXtalRC(uint32_t u32ClkMask)
This function disable clock source.
void CLK_DisableSysTick(void)
Disable System Tick counter.
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set selected module clock source and module clock divider.
void CLK_EnableXtalRC(uint32_t u32ClkMask)
This function enable clock source.
void CLK_EnableSysTick(uint32_t u32ClkSrc, uint32_t u32Count)
Enable System Tick counter.
uint32_t CLK_SetCoreClock(uint32_t u32Hclk)
This function set HCLK frequency. The frequency unit is Hz. The range of u32Hclk is 24 ~ 42 MHz.
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
uint32_t CLK_GetHXTFreq(void)
This function get external high frequency crystal frequency. The frequency unit is Hz.
#define CLK_CLKSTATUS_LIRC_STB_Msk
#define CLK_PWRCTL_LXT_EN_Msk
#define CLK_PWRCTL_WK_DLY_Msk
#define CLK_CLKSTATUS_LXT_STB_Msk
#define CLK_CLKSTATUS_HIRC_STB_Msk
#define CLK_CLKSTATUS_PLL_STB_Msk
#define CLK_PWRCTL_HIRC_EN_Msk
#define CLK_PLLCTL_PD_Msk
#define CLK_PLLCTL_IN_DV_Msk
#define CLK_PLLCTL_FB_DV_Msk
#define CLK_PWRCTL_HXT_EN_Msk
#define CLK_PLLCTL_PLL_SRC_Msk
#define CLK_APBCLK_FDIV_EN_Msk
#define CLK_PWRCTL_PD_EN_Msk
#define CLK_FRQDIV_FDIV_EN_Msk
#define CLK_PWRCTL_LIRC_EN_Msk
#define CLK_CLKSTATUS_HXT_STB_Msk
#define CLK_PLLCTL_PLL_SRC_Pos
#define CLK
Pointer to CLK register structure.
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock with current core Clock retrieved from CPU registers.