NUC029FAE_BSP V3.01.004
The Board Support Package for NUC029FAE MCU
Modules | Data Structures

Type definitions for the System Control Block Registers. More...

Collaboration diagram for System Control Block (SCB):

Modules

 System Tick Timer (SysTick)
 Type definitions for the System Timer Registers.
 

Data Structures

struct  SCB_Type
 Structure type to access the System Control Block (SCB). More...
 
#define SCB_CPUID_IMPLEMENTER_Pos   24U
 
#define SCB_CPUID_IMPLEMENTER_Msk   (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
 
#define SCB_CPUID_VARIANT_Pos   20U
 
#define SCB_CPUID_VARIANT_Msk   (0xFUL << SCB_CPUID_VARIANT_Pos)
 
#define SCB_CPUID_ARCHITECTURE_Pos   16U
 
#define SCB_CPUID_ARCHITECTURE_Msk   (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)
 
#define SCB_CPUID_PARTNO_Pos   4U
 
#define SCB_CPUID_PARTNO_Msk   (0xFFFUL << SCB_CPUID_PARTNO_Pos)
 
#define SCB_CPUID_REVISION_Pos   0U
 
#define SCB_CPUID_REVISION_Msk   (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)
 
#define SCB_ICSR_NMIPENDSET_Pos   31U
 
#define SCB_ICSR_NMIPENDSET_Msk   (1UL << SCB_ICSR_NMIPENDSET_Pos)
 
#define SCB_ICSR_PENDSVSET_Pos   28U
 
#define SCB_ICSR_PENDSVSET_Msk   (1UL << SCB_ICSR_PENDSVSET_Pos)
 
#define SCB_ICSR_PENDSVCLR_Pos   27U
 
#define SCB_ICSR_PENDSVCLR_Msk   (1UL << SCB_ICSR_PENDSVCLR_Pos)
 
#define SCB_ICSR_PENDSTSET_Pos   26U
 
#define SCB_ICSR_PENDSTSET_Msk   (1UL << SCB_ICSR_PENDSTSET_Pos)
 
#define SCB_ICSR_PENDSTCLR_Pos   25U
 
#define SCB_ICSR_PENDSTCLR_Msk   (1UL << SCB_ICSR_PENDSTCLR_Pos)
 
#define SCB_ICSR_ISRPREEMPT_Pos   23U
 
#define SCB_ICSR_ISRPREEMPT_Msk   (1UL << SCB_ICSR_ISRPREEMPT_Pos)
 
#define SCB_ICSR_ISRPENDING_Pos   22U
 
#define SCB_ICSR_ISRPENDING_Msk   (1UL << SCB_ICSR_ISRPENDING_Pos)
 
#define SCB_ICSR_VECTPENDING_Pos   12U
 
#define SCB_ICSR_VECTPENDING_Msk   (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
 
#define SCB_ICSR_VECTACTIVE_Pos   0U
 
#define SCB_ICSR_VECTACTIVE_Msk   (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)
 
#define SCB_AIRCR_VECTKEY_Pos   16U
 
#define SCB_AIRCR_VECTKEY_Msk   (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
 
#define SCB_AIRCR_VECTKEYSTAT_Pos   16U
 
#define SCB_AIRCR_VECTKEYSTAT_Msk   (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
 
#define SCB_AIRCR_ENDIANESS_Pos   15U
 
#define SCB_AIRCR_ENDIANESS_Msk   (1UL << SCB_AIRCR_ENDIANESS_Pos)
 
#define SCB_AIRCR_SYSRESETREQ_Pos   2U
 
#define SCB_AIRCR_SYSRESETREQ_Msk   (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
 
#define SCB_AIRCR_VECTCLRACTIVE_Pos   1U
 
#define SCB_AIRCR_VECTCLRACTIVE_Msk   (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
 
#define SCB_SCR_SEVONPEND_Pos   4U
 
#define SCB_SCR_SEVONPEND_Msk   (1UL << SCB_SCR_SEVONPEND_Pos)
 
#define SCB_SCR_SLEEPDEEP_Pos   2U
 
#define SCB_SCR_SLEEPDEEP_Msk   (1UL << SCB_SCR_SLEEPDEEP_Pos)
 
#define SCB_SCR_SLEEPONEXIT_Pos   1U
 
#define SCB_SCR_SLEEPONEXIT_Msk   (1UL << SCB_SCR_SLEEPONEXIT_Pos)
 
#define SCB_CCR_STKALIGN_Pos   9U
 
#define SCB_CCR_STKALIGN_Msk   (1UL << SCB_CCR_STKALIGN_Pos)
 
#define SCB_CCR_UNALIGN_TRP_Pos   3U
 
#define SCB_CCR_UNALIGN_TRP_Msk   (1UL << SCB_CCR_UNALIGN_TRP_Pos)
 
#define SCB_SHCSR_SVCALLPENDED_Pos   15U
 
#define SCB_SHCSR_SVCALLPENDED_Msk   (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
 

Detailed Description

Type definitions for the System Control Block Registers.

Macro Definition Documentation

◆ SCB_AIRCR_ENDIANESS_Msk

#define SCB_AIRCR_ENDIANESS_Msk   (1UL << SCB_AIRCR_ENDIANESS_Pos)

SCB AIRCR: ENDIANESS Mask

Definition at line 454 of file core_cm0.h.

◆ SCB_AIRCR_ENDIANESS_Pos

#define SCB_AIRCR_ENDIANESS_Pos   15U

SCB AIRCR: ENDIANESS Position

Definition at line 453 of file core_cm0.h.

◆ SCB_AIRCR_SYSRESETREQ_Msk

#define SCB_AIRCR_SYSRESETREQ_Msk   (1UL << SCB_AIRCR_SYSRESETREQ_Pos)

SCB AIRCR: SYSRESETREQ Mask

Definition at line 457 of file core_cm0.h.

◆ SCB_AIRCR_SYSRESETREQ_Pos

#define SCB_AIRCR_SYSRESETREQ_Pos   2U

SCB AIRCR: SYSRESETREQ Position

Definition at line 456 of file core_cm0.h.

◆ SCB_AIRCR_VECTCLRACTIVE_Msk

#define SCB_AIRCR_VECTCLRACTIVE_Msk   (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)

SCB AIRCR: VECTCLRACTIVE Mask

Definition at line 460 of file core_cm0.h.

◆ SCB_AIRCR_VECTCLRACTIVE_Pos

#define SCB_AIRCR_VECTCLRACTIVE_Pos   1U

SCB AIRCR: VECTCLRACTIVE Position

Definition at line 459 of file core_cm0.h.

◆ SCB_AIRCR_VECTKEY_Msk

#define SCB_AIRCR_VECTKEY_Msk   (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)

SCB AIRCR: VECTKEY Mask

Definition at line 448 of file core_cm0.h.

◆ SCB_AIRCR_VECTKEY_Pos

#define SCB_AIRCR_VECTKEY_Pos   16U

SCB AIRCR: VECTKEY Position

Definition at line 447 of file core_cm0.h.

◆ SCB_AIRCR_VECTKEYSTAT_Msk

#define SCB_AIRCR_VECTKEYSTAT_Msk   (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)

SCB AIRCR: VECTKEYSTAT Mask

Definition at line 451 of file core_cm0.h.

◆ SCB_AIRCR_VECTKEYSTAT_Pos

#define SCB_AIRCR_VECTKEYSTAT_Pos   16U

SCB AIRCR: VECTKEYSTAT Position

Definition at line 450 of file core_cm0.h.

◆ SCB_CCR_STKALIGN_Msk

#define SCB_CCR_STKALIGN_Msk   (1UL << SCB_CCR_STKALIGN_Pos)

SCB CCR: STKALIGN Mask

Definition at line 474 of file core_cm0.h.

◆ SCB_CCR_STKALIGN_Pos

#define SCB_CCR_STKALIGN_Pos   9U

SCB CCR: STKALIGN Position

Definition at line 473 of file core_cm0.h.

◆ SCB_CCR_UNALIGN_TRP_Msk

#define SCB_CCR_UNALIGN_TRP_Msk   (1UL << SCB_CCR_UNALIGN_TRP_Pos)

SCB CCR: UNALIGN_TRP Mask

Definition at line 477 of file core_cm0.h.

◆ SCB_CCR_UNALIGN_TRP_Pos

#define SCB_CCR_UNALIGN_TRP_Pos   3U

SCB CCR: UNALIGN_TRP Position

Definition at line 476 of file core_cm0.h.

◆ SCB_CPUID_ARCHITECTURE_Msk

#define SCB_CPUID_ARCHITECTURE_Msk   (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)

SCB CPUID: ARCHITECTURE Mask

Definition at line 410 of file core_cm0.h.

◆ SCB_CPUID_ARCHITECTURE_Pos

#define SCB_CPUID_ARCHITECTURE_Pos   16U

SCB CPUID: ARCHITECTURE Position

Definition at line 409 of file core_cm0.h.

◆ SCB_CPUID_IMPLEMENTER_Msk

#define SCB_CPUID_IMPLEMENTER_Msk   (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)

SCB CPUID: IMPLEMENTER Mask

Definition at line 404 of file core_cm0.h.

◆ SCB_CPUID_IMPLEMENTER_Pos

#define SCB_CPUID_IMPLEMENTER_Pos   24U

SCB CPUID: IMPLEMENTER Position

Definition at line 403 of file core_cm0.h.

◆ SCB_CPUID_PARTNO_Msk

#define SCB_CPUID_PARTNO_Msk   (0xFFFUL << SCB_CPUID_PARTNO_Pos)

SCB CPUID: PARTNO Mask

Definition at line 413 of file core_cm0.h.

◆ SCB_CPUID_PARTNO_Pos

#define SCB_CPUID_PARTNO_Pos   4U

SCB CPUID: PARTNO Position

Definition at line 412 of file core_cm0.h.

◆ SCB_CPUID_REVISION_Msk

#define SCB_CPUID_REVISION_Msk   (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)

SCB CPUID: REVISION Mask

Definition at line 416 of file core_cm0.h.

◆ SCB_CPUID_REVISION_Pos

#define SCB_CPUID_REVISION_Pos   0U

SCB CPUID: REVISION Position

Definition at line 415 of file core_cm0.h.

◆ SCB_CPUID_VARIANT_Msk

#define SCB_CPUID_VARIANT_Msk   (0xFUL << SCB_CPUID_VARIANT_Pos)

SCB CPUID: VARIANT Mask

Definition at line 407 of file core_cm0.h.

◆ SCB_CPUID_VARIANT_Pos

#define SCB_CPUID_VARIANT_Pos   20U

SCB CPUID: VARIANT Position

Definition at line 406 of file core_cm0.h.

◆ SCB_ICSR_ISRPENDING_Msk

#define SCB_ICSR_ISRPENDING_Msk   (1UL << SCB_ICSR_ISRPENDING_Pos)

SCB ICSR: ISRPENDING Mask

Definition at line 438 of file core_cm0.h.

◆ SCB_ICSR_ISRPENDING_Pos

#define SCB_ICSR_ISRPENDING_Pos   22U

SCB ICSR: ISRPENDING Position

Definition at line 437 of file core_cm0.h.

◆ SCB_ICSR_ISRPREEMPT_Msk

#define SCB_ICSR_ISRPREEMPT_Msk   (1UL << SCB_ICSR_ISRPREEMPT_Pos)

SCB ICSR: ISRPREEMPT Mask

Definition at line 435 of file core_cm0.h.

◆ SCB_ICSR_ISRPREEMPT_Pos

#define SCB_ICSR_ISRPREEMPT_Pos   23U

SCB ICSR: ISRPREEMPT Position

Definition at line 434 of file core_cm0.h.

◆ SCB_ICSR_NMIPENDSET_Msk

#define SCB_ICSR_NMIPENDSET_Msk   (1UL << SCB_ICSR_NMIPENDSET_Pos)

SCB ICSR: NMIPENDSET Mask

Definition at line 420 of file core_cm0.h.

◆ SCB_ICSR_NMIPENDSET_Pos

#define SCB_ICSR_NMIPENDSET_Pos   31U

SCB ICSR: NMIPENDSET Position

Definition at line 419 of file core_cm0.h.

◆ SCB_ICSR_PENDSTCLR_Msk

#define SCB_ICSR_PENDSTCLR_Msk   (1UL << SCB_ICSR_PENDSTCLR_Pos)

SCB ICSR: PENDSTCLR Mask

Definition at line 432 of file core_cm0.h.

◆ SCB_ICSR_PENDSTCLR_Pos

#define SCB_ICSR_PENDSTCLR_Pos   25U

SCB ICSR: PENDSTCLR Position

Definition at line 431 of file core_cm0.h.

◆ SCB_ICSR_PENDSTSET_Msk

#define SCB_ICSR_PENDSTSET_Msk   (1UL << SCB_ICSR_PENDSTSET_Pos)

SCB ICSR: PENDSTSET Mask

Definition at line 429 of file core_cm0.h.

◆ SCB_ICSR_PENDSTSET_Pos

#define SCB_ICSR_PENDSTSET_Pos   26U

SCB ICSR: PENDSTSET Position

Definition at line 428 of file core_cm0.h.

◆ SCB_ICSR_PENDSVCLR_Msk

#define SCB_ICSR_PENDSVCLR_Msk   (1UL << SCB_ICSR_PENDSVCLR_Pos)

SCB ICSR: PENDSVCLR Mask

Definition at line 426 of file core_cm0.h.

◆ SCB_ICSR_PENDSVCLR_Pos

#define SCB_ICSR_PENDSVCLR_Pos   27U

SCB ICSR: PENDSVCLR Position

Definition at line 425 of file core_cm0.h.

◆ SCB_ICSR_PENDSVSET_Msk

#define SCB_ICSR_PENDSVSET_Msk   (1UL << SCB_ICSR_PENDSVSET_Pos)

SCB ICSR: PENDSVSET Mask

Definition at line 423 of file core_cm0.h.

◆ SCB_ICSR_PENDSVSET_Pos

#define SCB_ICSR_PENDSVSET_Pos   28U

SCB ICSR: PENDSVSET Position

Definition at line 422 of file core_cm0.h.

◆ SCB_ICSR_VECTACTIVE_Msk

#define SCB_ICSR_VECTACTIVE_Msk   (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)

SCB ICSR: VECTACTIVE Mask

Definition at line 444 of file core_cm0.h.

◆ SCB_ICSR_VECTACTIVE_Pos

#define SCB_ICSR_VECTACTIVE_Pos   0U

SCB ICSR: VECTACTIVE Position

Definition at line 443 of file core_cm0.h.

◆ SCB_ICSR_VECTPENDING_Msk

#define SCB_ICSR_VECTPENDING_Msk   (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)

SCB ICSR: VECTPENDING Mask

Definition at line 441 of file core_cm0.h.

◆ SCB_ICSR_VECTPENDING_Pos

#define SCB_ICSR_VECTPENDING_Pos   12U

SCB ICSR: VECTPENDING Position

Definition at line 440 of file core_cm0.h.

◆ SCB_SCR_SEVONPEND_Msk

#define SCB_SCR_SEVONPEND_Msk   (1UL << SCB_SCR_SEVONPEND_Pos)

SCB SCR: SEVONPEND Mask

Definition at line 464 of file core_cm0.h.

◆ SCB_SCR_SEVONPEND_Pos

#define SCB_SCR_SEVONPEND_Pos   4U

SCB SCR: SEVONPEND Position

Definition at line 463 of file core_cm0.h.

◆ SCB_SCR_SLEEPDEEP_Msk

#define SCB_SCR_SLEEPDEEP_Msk   (1UL << SCB_SCR_SLEEPDEEP_Pos)

SCB SCR: SLEEPDEEP Mask

Definition at line 467 of file core_cm0.h.

◆ SCB_SCR_SLEEPDEEP_Pos

#define SCB_SCR_SLEEPDEEP_Pos   2U

SCB SCR: SLEEPDEEP Position

Definition at line 466 of file core_cm0.h.

◆ SCB_SCR_SLEEPONEXIT_Msk

#define SCB_SCR_SLEEPONEXIT_Msk   (1UL << SCB_SCR_SLEEPONEXIT_Pos)

SCB SCR: SLEEPONEXIT Mask

Definition at line 470 of file core_cm0.h.

◆ SCB_SCR_SLEEPONEXIT_Pos

#define SCB_SCR_SLEEPONEXIT_Pos   1U

SCB SCR: SLEEPONEXIT Position

Definition at line 469 of file core_cm0.h.

◆ SCB_SHCSR_SVCALLPENDED_Msk

#define SCB_SHCSR_SVCALLPENDED_Msk   (1UL << SCB_SHCSR_SVCALLPENDED_Pos)

SCB SHCSR: SVCALLPENDED Mask

Definition at line 481 of file core_cm0.h.

◆ SCB_SHCSR_SVCALLPENDED_Pos

#define SCB_SHCSR_SVCALLPENDED_Pos   15U

SCB SHCSR: SVCALLPENDED Position

Definition at line 480 of file core_cm0.h.