MINI58_BSP V3.01.005
The Board Support Package for Mini58 Series MCU
Functions
Collaboration diagram for CLK Exported Functions:

Functions

__STATIC_INLINE uint32_t CLK_GetPLLClockFreq (void)
 Get PLL clock frequency. More...
 
void CLK_DisableCKO (void)
 This function disable frequency output function. More...
 
void CLK_EnableCKO (uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
 This function enable frequency divider module clock, enable frequency divider clock function and configure frequency divider. More...
 
void CLK_PowerDown (void)
 This function let system enter to Power-down mode. More...
 
void CLK_Idle (void)
 This function let system enter to Idle mode. More...
 
uint32_t CLK_GetHXTFreq (void)
 This function get external high frequency crystal frequency. The frequency unit is Hz. More...
 
uint32_t CLK_GetLXTFreq (void)
 This function get external low frequency crystal frequency. The frequency unit is Hz. More...
 
uint32_t CLK_GetHCLKFreq (void)
 This function get HCLK frequency. The frequency unit is Hz. More...
 
uint32_t CLK_GetCPUFreq (void)
 This function get CPU frequency. The frequency unit is Hz. More...
 
uint32_t CLK_SetCoreClock (uint32_t u32Hclk)
 Set HCLK frequency. More...
 
void CLK_SetHCLK (uint32_t u32ClkSrc, uint32_t u32ClkDiv)
 This function set HCLK clock source and HCLK clock divider. More...
 
void CLK_SetModuleClock (uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
 This function set selected module clock source and module clock divider. More...
 
void CLK_SetSysTickClockSrc (uint32_t u32ClkSrc)
 This function set SysTick clock source. More...
 
void CLK_EnableSysTick (uint32_t u32ClkSrc, uint32_t u32Count)
 Enable System Tick counter. More...
 
void CLK_DisableSysTick (void)
 Disable System Tick counter. More...
 
void CLK_EnableXtalRC (uint32_t u32ClkMask)
 This function enable clock source. More...
 
void CLK_DisableXtalRC (uint32_t u32ClkMask)
 This function disable clock source. More...
 
void CLK_EnableModuleClock (uint32_t u32ModuleIdx)
 This function enable module clock. More...
 
void CLK_DisableModuleClock (uint32_t u32ModuleIdx)
 This function disable module clock. More...
 
int32_t CLK_SysTickDelay (uint32_t us)
 This function execute delay function. More...
 
uint32_t CLK_EnablePLL (uint32_t u32PllClkSrc, uint32_t u32PllFreq)
 Set PLL frequency. More...
 
void CLK_DisablePLL (void)
 Disable PLL. More...
 
uint32_t CLK_WaitClockReady (uint32_t u32ClkMask)
 This function check selected clock source status. More...
 

Detailed Description

Function Documentation

◆ CLK_DisableCKO()

void CLK_DisableCKO ( void  )

This function disable frequency output function.

Returns
None

Definition at line 30 of file clk.c.

◆ CLK_DisableModuleClock()

void CLK_DisableModuleClock ( uint32_t  u32ModuleIdx)

This function disable module clock.

Parameters
[in]u32ModuleIdxis module index
Returns
None

Definition at line 405 of file clk.c.

◆ CLK_DisablePLL()

void CLK_DisablePLL ( void  )

Disable PLL.

Parameters
None
Returns
None

This function set PLL in Power-down mode. The register write-protection function should be disabled before using this function.

Definition at line 586 of file clk.c.

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◆ CLK_DisableSysTick()

void CLK_DisableSysTick ( void  )

Disable System Tick counter.

Returns
None

This function disable System Tick counter.

Definition at line 326 of file clk.c.

◆ CLK_DisableXtalRC()

void CLK_DisableXtalRC ( uint32_t  u32ClkMask)

This function disable clock source.

Parameters
[in]u32ClkMaskis clock source mask. Including :
Returns
None

Definition at line 355 of file clk.c.

◆ CLK_EnableCKO()

void CLK_EnableCKO ( uint32_t  u32ClkSrc,
uint32_t  u32ClkDiv,
uint32_t  u32ClkDivBy1En 
)

This function enable frequency divider module clock, enable frequency divider clock function and configure frequency divider.

Parameters
[in]u32ClkSrcis frequency divider function clock source
[in]u32ClkDivSet the clock divider to CKO. 0 <= u32ClkDiv <= 15
[in]u32ClkDivBy1Enis frequency divided by one enable.
Returns
None

Output selected clock to CKO. The output clock frequency is divided by u32ClkDiv. The formula is: CKO frequency = (Clock source frequency) / 2^(u32ClkDiv + 1) This function is just used to set CKO clock. User must enable I/O for CKO clock output pin by themselves.

Definition at line 54 of file clk.c.

◆ CLK_EnableModuleClock()

void CLK_EnableModuleClock ( uint32_t  u32ModuleIdx)

This function enable module clock.

Parameters
[in]u32ModuleIdxis module index. Including :
Returns
None

Definition at line 380 of file clk.c.

◆ CLK_EnablePLL()

uint32_t CLK_EnablePLL ( uint32_t  u32PllClkSrc,
uint32_t  u32PllFreq 
)

Set PLL frequency.

Parameters
[in]u32PllClkSrcis PLL clock source. Including :
[in]u32PllFreqis PLL frequency.
Returns
PLL frequency

This function is used to configure PLLCTL register to set specified PLL frequency. The register write-protection function should be disabled before using this function.

Definition at line 420 of file clk.c.

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◆ CLK_EnableSysTick()

void CLK_EnableSysTick ( uint32_t  u32ClkSrc,
uint32_t  u32Count 
)

Enable System Tick counter.

Parameters
[in]u32ClkSrcis System Tick clock source. Including:
[in]u32Countis System Tick reload value. It should be 0x1~0xFFFFFF.
Returns
None

This function set System Tick clock source, reload value, enable System Tick counter and interrupt. The register write-protection function should be disabled before using this function.

Definition at line 306 of file clk.c.

◆ CLK_EnableXtalRC()

void CLK_EnableXtalRC ( uint32_t  u32ClkMask)

This function enable clock source.

Parameters
[in]u32ClkMaskis clock source mask. Including :
Returns
None

Definition at line 339 of file clk.c.

◆ CLK_GetCPUFreq()

uint32_t CLK_GetCPUFreq ( void  )

This function get CPU frequency. The frequency unit is Hz.

Returns
CPU frequency

Definition at line 126 of file clk.c.

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◆ CLK_GetHCLKFreq()

uint32_t CLK_GetHCLKFreq ( void  )

This function get HCLK frequency. The frequency unit is Hz.

Returns
HCLK frequency

Definition at line 115 of file clk.c.

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◆ CLK_GetHXTFreq()

uint32_t CLK_GetHXTFreq ( void  )

This function get external high frequency crystal frequency. The frequency unit is Hz.

Returns
None

Definition at line 91 of file clk.c.

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◆ CLK_GetLXTFreq()

uint32_t CLK_GetLXTFreq ( void  )

This function get external low frequency crystal frequency. The frequency unit is Hz.

Returns
LXT frequency

Definition at line 103 of file clk.c.

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◆ CLK_GetPLLClockFreq()

__STATIC_INLINE uint32_t CLK_GetPLLClockFreq ( void  )

Get PLL clock frequency.

Parameters
None
Returns
PLL frequency

This function get PLL frequency. The frequency unit is Hz.

Definition at line 197 of file clk.h.

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◆ CLK_Idle()

void CLK_Idle ( void  )

This function let system enter to Idle mode.

Returns
None

Definition at line 81 of file clk.c.

◆ CLK_PowerDown()

void CLK_PowerDown ( void  )

This function let system enter to Power-down mode.

Returns
None

Definition at line 70 of file clk.c.

◆ CLK_SetCoreClock()

uint32_t CLK_SetCoreClock ( uint32_t  u32Hclk)

Set HCLK frequency.

Parameters
[in]u32Hclkis HCLK frequency. The range of u32Hclk is 26 MHz ~ 50 MHz.
Returns
HCLK frequency

This function is used to set HCLK frequency. The frequency unit is Hz. It would configure PLL frequency to 100MHz ~ 200MHz, set HCLK clock divider as 2 and switch HCLK clock source to PLL. The register write-protection function should be disabled before using this function.

Definition at line 141 of file clk.c.

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◆ CLK_SetHCLK()

void CLK_SetHCLK ( uint32_t  u32ClkSrc,
uint32_t  u32ClkDiv 
)

This function set HCLK clock source and HCLK clock divider.

Parameters
[in]u32ClkSrcis HCLK clock source. Including :
[in]u32ClkDivis HCLK clock divider. Including :
Returns
None

Definition at line 197 of file clk.c.

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◆ CLK_SetModuleClock()

void CLK_SetModuleClock ( uint32_t  u32ModuleIdx,
uint32_t  u32ClkSrc,
uint32_t  u32ClkDiv 
)

This function set selected module clock source and module clock divider.

Parameters
[in]u32ModuleIdxis module index.
[in]u32ClkSrcis module clock source.
[in]u32ClkDivis module clock divider.
Returns
None

Valid parameter combinations listed in following table:

Module index Clock source Divider
WDT_MODULE CLK_CLKSEL1_WDTSEL_XTAL x
WDT_MODULE CLK_CLKSEL1_WDTSEL_HCLK_DIV2048 x
WDT_MODULE CLK_CLKSEL1_WDTSEL_LIRC x
TMR0_MODULE CLK_CLKSEL1_TMR0SEL_XTAL x
TMR0_MODULE CLK_CLKSEL1_TMR0SEL_LIRC x
TMR0_MODULE CLK_CLKSEL1_TMR0SEL_HCLK x
TMR0_MODULE CLK_CLKSEL1_TMR0SEL_TM0 x
TMR0_MODULE CLK_CLKSEL1_TMR0SEL_HIRC x
TMR1_MODULE CLK_CLKSEL1_TMR1SEL_XTAL x
TMR1_MODULE CLK_CLKSEL1_TMR1SEL_LIRC x
TMR1_MODULE CLK_CLKSEL1_TMR1SEL_HCLK x
TMR1_MODULE CLK_CLKSEL1_TMR1SEL_TM1 x
TMR1_MODULE CLK_CLKSEL1_TMR1SEL_HIRC x
CLKO_MODULE CLK_CLKSEL2_CLKOSEL_XTAL x
CLKO_MODULE CLK_CLKSEL2_CLKOSEL_HCLK x
CLKO_MODULE CLK_CLKSEL2_CLKOSEL_HIRC x
I2C0_MODULE x x
I2C1_MODULE x x
SPI0_MODULE CLK_CLKSEL1_SPISEL_XTAL x
SPI0_MODULE CLK_CLKSEL1_SPISEL_HCLK x
SPI0_MODULE CLK_CLKSEL1_SPISEL_PLL x
UART0_MODULE CLK_CLKSEL1_UARTSEL_XTAL CLK_CLKDIV_UART(x)
UART0_MODULE CLK_CLKSEL1_UARTSEL_PLL CLK_CLKDIV_UART(x)
UART0_MODULE CLK_CLKSEL1_UARTSEL_HIRC CLK_CLKDIV_UART(x)
UART1_MODULE CLK_CLKSEL1_UARTSEL_XTAL CLK_CLKDIV_UART(x)
UART1_MODULE CLK_CLKSEL1_UARTSEL_PLL CLK_CLKDIV_UART(x)
UART1_MODULE CLK_CLKSEL1_UARTSEL_HIRC CLK_CLKDIV_UART(x)
PWMCH01_MODULE CLK_CLKSEL1_PWMCH01SEL_HCLK x
PWMCH23_MODULE CLK_CLKSEL1_PWMCH23SEL_HCLK x
PWMCH45_MODULE CLK_CLKSEL2_PWMCH45SEL_HCLK x
ADC_MODULE CLK_CLKSEL1_ADCSEL_XTAL CLK_CLKDIV_ADC(x)
ADC_MODULE CLK_CLKSEL1_ADCSEL_PLL CLK_CLKDIV_ADC(x)
ADC_MODULE CLK_CLKSEL1_ADCSEL_HCLK CLK_CLKDIV_ADC(x)
ADC_MODULE CLK_CLKSEL1_ADCSEL_HIRC CLK_CLKDIV_ADC(x)
ACMP_MODULE x x
WWDT_MODULE CLK_CLKSEL2_WWDTSEL_HCLK_DIV2048 x
WWDT_MODULE CLK_CLKSEL2_WWDTSEL_LIRC x

Definition at line 258 of file clk.c.

◆ CLK_SetSysTickClockSrc()

void CLK_SetSysTickClockSrc ( uint32_t  u32ClkSrc)

This function set SysTick clock source.

Parameters
[in]u32ClkSrcis module clock source. Including
Returns
None

Definition at line 288 of file clk.c.

◆ CLK_SysTickDelay()

int32_t CLK_SysTickDelay ( uint32_t  us)

This function execute delay function.

Parameters
[in]usDelay time. The Max value is 2^24 / CPU Clock(MHz). Ex: 50MHz => 335544us, 48MHz => 349525us, 28MHz => 699050us ...
Returns
0 success -1 clock time out

Use the SysTick to generate the delay time and the UNIT is in us. The SysTick clock source is from HCLK, i.e the same as system core clock.

Definition at line 600 of file clk.c.

◆ CLK_WaitClockReady()

uint32_t CLK_WaitClockReady ( uint32_t  u32ClkMask)

This function check selected clock source status.

Parameters
[in]u32ClkMaskis selected clock source. Including
Returns
0 clock is not stable 1 clock is stable

To wait for clock ready by specified CLKSTATUS bit or timeout (~5ms)

Definition at line 630 of file clk.c.

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