39 uint32_t u32InputMode,
62 SYS->IPRST1 &= ~SYS_IPRST1_ADCRST_Msk;
92 ADC->TRGDLY = (
ADC->TRGDLY & ~ADC_TRGDLY_DELAY_Msk) | u32Param;
130 uint32_t u32SampleTime)
132 ADC->EXTSMPT = (
ADC->EXTSMPT & ~ADC_EXTSMPT_EXTSMPT_Msk) | u32SampleTime;
172 ADC->CTL &= ~ADC_CTL_ADCIEN_Msk;
174 ADC->CMP0 &= ~ADC_CMP0_ADCMPIE_Msk;
176 ADC->CMP1 &= ~ADC_CMP1_ADCMPIE_Msk;
Mini58 series peripheral access layer header file. This file contains all the peripheral register's d...
#define SYS_IPRST1_ADCRST_Msk
#define ADC_TRIGGER_BY_PWM
#define ADC_TRIGGER_BY_EXT_PIN
#define ADC_RISING_EDGE_TRIGGER
void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTriSrc1, uint32_t u32SeqModeTriSrc2)
ADC PWM Sequential Mode PWM Trigger Source and type.
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
void ADC_Close(ADC_T *adc)
Disable ADC module.
void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel)
ADC PWM Sequential Mode Control.
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Set ADC sample time for designated channel.
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
#define ADC_SEQCTL_SEQEN_Msk
#define ADC_CHEN_CHEN2_Msk
#define ADC_CHEN_CHEN5_Msk
#define ADC_CHEN_CHEN3_Msk
#define ADC_CHEN_CHEN4_Msk
#define ADC_CHEN_CHEN0_Msk
#define ADC_CMP1_ADCMPIE_Msk
#define ADC_SEQCTL_SEQTYPE_Msk
#define ADC_CHEN_CHEN1_Msk
#define ADC_CMP0_ADCMPIE_Msk
#define ADC_SEQCTL_MODESEL_Msk
#define ADC_SEQCTL_TRG1CTL_Pos
#define ADC_CTL_HWTRGEN_Msk
#define ADC_CTL_ADCIEN_Msk
#define ADC_CHEN_CHEN6_Msk
#define ADC_SEQCTL_TRG1CTL_Msk
#define ADC_SEQCTL_SEQTYPE_Pos
#define ADC_CHEN_CHEN7_Msk
#define ADC_SEQCTL_TRG2CTL_Pos
#define ADC_SEQCTL_TRG2CTL_Msk
#define ADC_SEQCTL_MODESEL_Pos
#define ADC
Pointer to ADC register structure.
#define SYS
Pointer to SYS register structure.