M480 BSP V3.05.005
The Board Support Package for M480 Series
usci_spi.c
Go to the documentation of this file.
1/****************************************************************************/
9#include "NuMicro.h"
10
43uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
44{
45 uint32_t u32ClkDiv = 0ul;
46 uint32_t u32Pclk;
47 uint32_t u32UspiClk = 0ul;
48
49 if(uspi == (USPI_T *)USPI0)
50 {
51 u32Pclk = CLK_GetPCLK0Freq();
52 }
53 else
54 {
55 u32Pclk = CLK_GetPCLK1Freq();
56 }
57
58 if(u32BusClock != 0ul)
59 {
60 u32ClkDiv = (uint32_t) ((((((u32Pclk/2ul)*10ul)/(u32BusClock))+5ul)/10ul)-1ul); /* Compute proper divider for USCI_SPI clock */
61 }
62 else {}
63
64 /* Enable USCI_SPI protocol */
65 uspi->CTL &= ~USPI_CTL_FUNMODE_Msk;
66 uspi->CTL = 1ul << USPI_CTL_FUNMODE_Pos;
67
68 /* Data format configuration */
69 if(u32DataWidth == 16ul)
70 {
71 u32DataWidth = 0ul;
72 }
73 else {}
74 uspi->LINECTL &= ~USPI_LINECTL_DWIDTH_Msk;
75 uspi->LINECTL |= (u32DataWidth << USPI_LINECTL_DWIDTH_Pos);
76
77 /* MSB data format */
78 uspi->LINECTL &= ~USPI_LINECTL_LSB_Msk;
79
80 /* Set slave selection signal active low */
81 if(u32MasterSlave == USPI_MASTER)
82 {
84 }
85 else
86 {
88 }
89
90 /* Set operating mode and transfer timing */
92 uspi->PROTCTL |= (u32MasterSlave | u32SPIMode);
93
94 /* Set USCI_SPI bus clock */
95 uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
96 uspi->BRGEN |= (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
98
99 if(u32BusClock != 0ul)
100 {
101 u32UspiClk = (uint32_t)( u32Pclk / ((u32ClkDiv+1ul)<<1) );
102 }
103 else {}
104
105 return u32UspiClk;
106}
107
114{
115 uspi->CTL &= ~USPI_CTL_FUNMODE_Msk;
116}
117
124{
126}
127
134{
136}
137
144{
146}
147
157void USPI_EnableAutoSS(USPI_T *uspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
158{
159 uspi->LINECTL = (uspi->LINECTL & ~USPI_LINECTL_CTLOINV_Msk) | u32ActiveLevel;
161}
162
169uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
170{
171 uint32_t u32ClkDiv;
172 uint32_t u32Pclk;
173
174 if(uspi == USPI0)
175 {
176 u32Pclk = CLK_GetPCLK0Freq();
177 }
178 else
179 {
180 u32Pclk = CLK_GetPCLK1Freq();
181 }
182
183 u32ClkDiv = (uint32_t) ((((((u32Pclk/2ul)*10ul)/(u32BusClock))+5ul)/10ul)-1ul); /* Compute proper divider for USCI_SPI clock */
184
185 /* Set USCI_SPI bus clock */
186 uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
187 uspi->BRGEN |= (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
188
189 return ( u32Pclk / ((u32ClkDiv+1ul)<<1) );
190}
191
198{
199 uint32_t u32BusClk;
200 uint32_t u32ClkDiv;
201
202 u32ClkDiv = (uspi->BRGEN & USPI_BRGEN_CLKDIV_Msk) >> USPI_BRGEN_CLKDIV_Pos;
203
204 if(uspi == USPI0)
205 {
206 u32BusClk = (uint32_t)( CLK_GetPCLK0Freq() / ((u32ClkDiv+1ul)<<1) );
207 }
208 else
209 {
210 u32BusClk = (uint32_t)( CLK_GetPCLK1Freq() / ((u32ClkDiv+1ul)<<1) );
211 }
212
213 return u32BusClk;
214}
215
234void USPI_EnableInt(USPI_T *uspi, uint32_t u32Mask)
235{
236 /* Enable slave selection signal inactive interrupt flag */
238 {
240 }
241 else {}
242 /* Enable slave selection signal active interrupt flag */
244 {
246 }
247 else {}
248 /* Enable slave time-out interrupt flag */
250 {
252 }
253 else {}
254
255 /* Enable slave bit count error interrupt flag */
257 {
259 }
260 else {}
261 /* Enable TX under run interrupt flag */
263 {
265 }
266 else {}
267 /* Enable RX overrun interrupt flag */
268 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
269 {
271 }
272 else {}
273 /* Enable TX start interrupt flag */
274 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
275 {
277 }
278 else {}
279 /* Enable TX end interrupt flag */
281 {
283 }
284 else {}
285 /* Enable RX start interrupt flag */
286 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
287 {
289 }
290 else {}
291 /* Enable RX end interrupt flag */
293 {
295 }
296 else {}
297}
298
317void USPI_DisableInt(USPI_T *uspi, uint32_t u32Mask)
318{
319 /* Disable slave selection signal inactive interrupt flag */
321 {
322 uspi->PROTIEN &= ~USPI_PROTIEN_SSINAIEN_Msk;
323 }
324 else {}
325 /* Disable slave selection signal active interrupt flag */
327 {
328 uspi->PROTIEN &= ~USPI_PROTIEN_SSACTIEN_Msk;
329 }
330 else {}
331 /* Disable slave time-out interrupt flag */
333 {
334 uspi->PROTIEN &= ~USPI_PROTIEN_SLVTOIEN_Msk;
335 }
336 else {}
337 /* Disable slave bit count error interrupt flag */
339 {
340 uspi->PROTIEN &= ~USPI_PROTIEN_SLVBEIEN_Msk;
341 }
342 else {}
343 /* Disable TX under run interrupt flag */
345 {
346 uspi->BUFCTL &= ~USPI_BUFCTL_TXUDRIEN_Msk;
347 }
348 else {}
349 /* Disable RX overrun interrupt flag */
350 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
351 {
352 uspi->BUFCTL &= ~USPI_BUFCTL_RXOVIEN_Msk;
353 }
354 else {}
355 /* Disable TX start interrupt flag */
356 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
357 {
358 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk;
359 }
360 else {}
361 /* Disable TX end interrupt flag */
363 {
364 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk;
365 }
366 else {}
367 /* Disable RX start interrupt flag */
368 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
369 {
370 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk;
371 }
372 else {}
373 /* Disable RX end interrupt flag */
375 {
376 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk;
377 }
378 else {}
379}
380
399uint32_t USPI_GetIntFlag(USPI_T *uspi, uint32_t u32Mask)
400{
401 uint32_t u32TmpFlag;
402 uint32_t u32IntFlag = 0ul;
403
404 /* Check slave selection signal inactive interrupt flag */
405 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SSINAIF_Msk;
406 if(((u32Mask & USPI_SSINACT_INT_MASK)==USPI_SSINACT_INT_MASK) && (u32TmpFlag==USPI_PROTSTS_SSINAIF_Msk) )
407 {
408 u32IntFlag |= USPI_SSINACT_INT_MASK;
409 }
410 else {}
411 /* Check slave selection signal active interrupt flag */
412
413 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SSACTIF_Msk;
414 if(((u32Mask & USPI_SSACT_INT_MASK)==USPI_SSACT_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SSACTIF_Msk))
415 {
416 u32IntFlag |= USPI_SSACT_INT_MASK;
417 }
418 else {}
419
420 /* Check slave time-out interrupt flag */
421 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SLVTOIF_Msk;
422 if(((u32Mask & USPI_SLVTO_INT_MASK)==USPI_SLVTO_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SLVTOIF_Msk))
423 {
424 u32IntFlag |= USPI_SLVTO_INT_MASK;
425 }
426 else {}
427
428 /* Check slave bit count error interrupt flag */
429 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SLVBEIF_Msk;
430 if(((u32Mask & USPI_SLVBE_INT_MASK)==USPI_SLVBE_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_SLVBEIF_Msk))
431 {
432 u32IntFlag |= USPI_SLVBE_INT_MASK;
433 }
434 else {}
435
436 /* Check TX under run interrupt flag */
437 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_TXUDRIF_Msk;
438 if(((u32Mask & USPI_TXUDR_INT_MASK)==USPI_TXUDR_INT_MASK) && (u32TmpFlag == USPI_BUFSTS_TXUDRIF_Msk))
439 {
440 u32IntFlag |= USPI_TXUDR_INT_MASK;
441 }
442 else {}
443
444 /* Check RX overrun interrupt flag */
445 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_RXOVIF_Msk;
446 if(((u32Mask & USPI_RXOV_INT_MASK)==USPI_RXOV_INT_MASK) && (u32TmpFlag == USPI_BUFSTS_RXOVIF_Msk))
447 {
448 u32IntFlag |= USPI_RXOV_INT_MASK;
449 }
450 else {}
451
452 /* Check TX start interrupt flag */
453 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_TXSTIF_Msk;
454 if(((u32Mask & USPI_TXST_INT_MASK)==USPI_TXST_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_TXSTIF_Msk))
455 {
456 u32IntFlag |= USPI_TXST_INT_MASK;
457 }
458 else {}
459
460 /* Check TX end interrupt flag */
461 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_TXENDIF_Msk;
462 if(((u32Mask & USPI_TXEND_INT_MASK)==USPI_TXEND_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_TXENDIF_Msk))
463 {
464 u32IntFlag |= USPI_TXEND_INT_MASK;
465 }
466 else {}
467
468 /* Check RX start interrupt flag */
469 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_RXSTIF_Msk;
470 if(((u32Mask & USPI_RXST_INT_MASK)==USPI_RXST_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_RXSTIF_Msk))
471 {
472 u32IntFlag |= USPI_RXST_INT_MASK;
473 }
474 else {}
475
476 /* Check RX end interrupt flag */
477 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_RXENDIF_Msk;
478 if(((u32Mask & USPI_RXEND_INT_MASK)==USPI_RXEND_INT_MASK) && (u32TmpFlag == USPI_PROTSTS_RXENDIF_Msk))
479 {
480 u32IntFlag |= USPI_RXEND_INT_MASK;
481 }
482 else {}
483 return u32IntFlag;
484}
485
504void USPI_ClearIntFlag(USPI_T *uspi, uint32_t u32Mask)
505{
506 /* Clear slave selection signal inactive interrupt flag */
508 {
510 }
511 else {}
512 /* Clear slave selection signal active interrupt flag */
514 {
516 }
517 else {}
518 /* Clear slave time-out interrupt flag */
520 {
522 }
523 else {}
524 /* Clear slave bit count error interrupt flag */
526 {
528 }
529 else {}
530 /* Clear TX under run interrupt flag */
532 {
534 }
535 else {}
536 /* Clear RX overrun interrupt flag */
538 {
540 }
541 else {}
542 /* Clear TX start interrupt flag */
544 {
546 }
547 else {}
548 /* Clear TX end interrupt flag */
550 {
552 }
553 else {}
554 /* Clear RX start interrupt flag */
556 {
558 }
559 else {}
560
561 /* Clear RX end interrupt flag */
563 {
565 }
566 else {}
567}
568
583uint32_t USPI_GetStatus(USPI_T *uspi, uint32_t u32Mask)
584{
585 uint32_t u32Flag = 0ul;
586 uint32_t u32TmpFlag;
587
588 /* Check busy status */
589 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_BUSY_Msk;
590 if(((u32Mask & USPI_BUSY_MASK)==USPI_BUSY_MASK) && (u32TmpFlag & USPI_PROTSTS_BUSY_Msk))
591 {
592 u32Flag |= USPI_BUSY_MASK;
593 }
594 else {}
595
596 /* Check RX empty flag */
597 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_RXEMPTY_Msk;
598 if(((u32Mask & USPI_RX_EMPTY_MASK)==USPI_RX_EMPTY_MASK) && (u32TmpFlag == USPI_BUFSTS_RXEMPTY_Msk))
599 {
600 u32Flag |= USPI_RX_EMPTY_MASK;
601 }
602 else {}
603
604 /* Check RX full flag */
605 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_RXFULL_Msk;
606 if(((u32Mask & USPI_RX_FULL_MASK)==USPI_RX_FULL_MASK) && (u32TmpFlag == USPI_BUFSTS_RXFULL_Msk))
607 {
608 u32Flag |= USPI_RX_FULL_MASK;
609 }
610 else {}
611
612 /* Check TX empty flag */
613 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_TXEMPTY_Msk;
614 if(((u32Mask & USPI_TX_EMPTY_MASK)==USPI_TX_EMPTY_MASK) && (u32TmpFlag == USPI_BUFSTS_TXEMPTY_Msk))
615 {
616 u32Flag |= USPI_TX_EMPTY_MASK;
617 }
618 else {}
619
620 /* Check TX full flag */
621 u32TmpFlag = uspi->BUFSTS & USPI_BUFSTS_TXFULL_Msk;
622 if(((u32Mask & USPI_TX_FULL_MASK)==USPI_TX_FULL_MASK) && (u32TmpFlag == USPI_BUFSTS_TXFULL_Msk))
623 {
624 u32Flag |= USPI_TX_FULL_MASK;
625 }
626 else {}
627
628 /* Check USCI_SPI_SS line status */
629 u32TmpFlag = uspi->PROTSTS & USPI_PROTSTS_SSLINE_Msk;
630 if(((u32Mask & USPI_SSLINE_STS_MASK)==USPI_SSLINE_STS_MASK) && (u32TmpFlag & USPI_PROTSTS_SSLINE_Msk))
631 {
632 u32Flag |= USPI_SSLINE_STS_MASK;
633 }
634 else {}
635 return u32Flag;
636}
637
644{
645 uspi->WKCTL |= USPI_WKCTL_WKEN_Msk;
646}
647
654{
655 uspi->WKCTL &= ~USPI_WKCTL_WKEN_Msk;
656}
657 /* end of group USCI_SPI_EXPORTED_FUNCTIONS */
659 /* end of group USCI_SPI_Driver */
661 /* end of group Standard_Driver */
663
664/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
NuMicro peripheral access layer header file.
uint32_t CLK_GetPCLK1Freq(void)
Get PCLK1 frequency.
Definition: clk.c:206
uint32_t CLK_GetPCLK0Freq(void)
Get PCLK0 frequency.
Definition: clk.c:166
#define USPI0
Definition: M480.h:451
#define USPI_PROTIEN_SSINAIEN_Msk
Definition: uspi_reg.h:1141
#define USPI_PROTCTL_SS_Msk
Definition: uspi_reg.h:1117
#define USPI_PROTSTS_TXENDIF_Msk
Definition: uspi_reg.h:1156
#define USPI_PROTSTS_SLVTOIF_Msk
Definition: uspi_reg.h:1165
#define USPI_INTEN_RXSTIEN_Msk
Definition: uspi_reg.h:991
#define USPI_BUFCTL_RXOVIEN_Msk
Definition: uspi_reg.h:1057
#define USPI_BUFSTS_TXEMPTY_Msk
Definition: uspi_reg.h:1078
#define USPI_CTLIN0_ININV_Msk
Definition: uspi_reg.h:1024
#define USPI_BRGEN_CLKDIV_Msk
Definition: uspi_reg.h:1012
#define USPI_BUFSTS_TXUDRIF_Msk
Definition: uspi_reg.h:1084
#define USPI_BUFCTL_TXUDRIEN_Msk
Definition: uspi_reg.h:1051
#define USPI_INTEN_RXENDIEN_Msk
Definition: uspi_reg.h:994
#define USPI_LINECTL_CTLOINV_Msk
Definition: uspi_reg.h:1036
#define USPI_BRGEN_CLKDIV_Pos
Definition: uspi_reg.h:1011
#define USPI_INTEN_TXENDIEN_Msk
Definition: uspi_reg.h:988
#define USPI_PROTCTL_SLAVE_Msk
Definition: uspi_reg.h:1111
#define USPI_LINECTL_DWIDTH_Pos
Definition: uspi_reg.h:1038
#define USPI_BUFSTS_RXEMPTY_Msk
Definition: uspi_reg.h:1069
#define USPI_BUFCTL_TXCLR_Msk
Definition: uspi_reg.h:1054
#define USPI_PROTSTS_TXSTIF_Msk
Definition: uspi_reg.h:1153
#define USPI_WKCTL_WKEN_Msk
Definition: uspi_reg.h:1099
#define USPI_PROTSTS_BUSY_Msk
Definition: uspi_reg.h:1180
#define USPI_BUFCTL_RXCLR_Msk
Definition: uspi_reg.h:1060
#define USPI_BUFSTS_TXFULL_Msk
Definition: uspi_reg.h:1081
#define USPI_INTEN_TXSTIEN_Msk
Definition: uspi_reg.h:985
#define USPI_PROTIEN_SLVBEIEN_Msk
Definition: uspi_reg.h:1150
#define USPI_PROTCTL_SCLKMODE_Msk
Definition: uspi_reg.h:1123
#define USPI_PROTSTS_SLVBEIF_Msk
Definition: uspi_reg.h:1168
#define USPI_PROTIEN_SSACTIEN_Msk
Definition: uspi_reg.h:1144
#define USPI_BUFSTS_RXFULL_Msk
Definition: uspi_reg.h:1072
#define USPI_PROTSTS_SSACTIF_Msk
Definition: uspi_reg.h:1174
#define USPI_PROTSTS_RXSTIF_Msk
Definition: uspi_reg.h:1159
#define USPI_CTL_FUNMODE_Pos
Definition: uspi_reg.h:981
#define USPI_PROTCTL_PROTEN_Msk
Definition: uspi_reg.h:1138
#define USPI_PROTSTS_RXENDIF_Msk
Definition: uspi_reg.h:1162
#define USPI_PROTCTL_AUTOSS_Msk
Definition: uspi_reg.h:1120
#define USPI_BUFSTS_RXOVIF_Msk
Definition: uspi_reg.h:1075
#define USPI_PROTIEN_SLVTOIEN_Msk
Definition: uspi_reg.h:1147
#define USPI_PROTSTS_SSINAIF_Msk
Definition: uspi_reg.h:1171
#define USPI_PROTSTS_SSLINE_Msk
Definition: uspi_reg.h:1177
#define USPI_RXST_INT_MASK
Definition: usci_spi.h:51
#define USPI_TXEND_INT_MASK
Definition: usci_spi.h:50
#define USPI_TX_EMPTY_MASK
Definition: usci_spi.h:58
#define USPI_MASTER
Definition: usci_spi.h:36
#define USPI_SLVTO_INT_MASK
Definition: usci_spi.h:45
#define USPI_TXST_INT_MASK
Definition: usci_spi.h:49
#define USPI_TX_FULL_MASK
Definition: usci_spi.h:59
#define USPI_RXEND_INT_MASK
Definition: usci_spi.h:52
#define USPI_SSINACT_INT_MASK
Definition: usci_spi.h:43
#define USPI_SSACT_INT_MASK
Definition: usci_spi.h:44
#define USPI_RXOV_INT_MASK
Definition: usci_spi.h:48
#define USPI_RX_EMPTY_MASK
Definition: usci_spi.h:56
#define USPI_BUSY_MASK
Definition: usci_spi.h:55
#define USPI_RX_FULL_MASK
Definition: usci_spi.h:57
#define USPI_SLVBE_INT_MASK
Definition: usci_spi.h:46
#define USPI_TXUDR_INT_MASK
Definition: usci_spi.h:47
#define USPI_SSLINE_STS_MASK
Definition: usci_spi.h:60
void USPI_Close(USPI_T *uspi)
Disable USCI_SPI function mode.
Definition: usci_spi.c:113
void USPI_ClearIntFlag(USPI_T *uspi, uint32_t u32Mask)
Clear interrupt flag.
Definition: usci_spi.c:504
void USPI_EnableInt(USPI_T *uspi, uint32_t u32Mask)
Enable related interrupts specified by u32Mask parameter.
Definition: usci_spi.c:234
uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make USCI_SPI module be ready to transfer. By default, the USCI_SPI transfer sequence i...
Definition: usci_spi.c:43
uint32_t USPI_GetBusClock(USPI_T *uspi)
Get the actual frequency of USCI_SPI bus clock. Only available in Master mode.
Definition: usci_spi.c:197
void USPI_DisableAutoSS(USPI_T *uspi)
Disable the automatic slave select function.
Definition: usci_spi.c:143
void USPI_EnableAutoSS(USPI_T *uspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave select function. Only available in Master mode.
Definition: usci_spi.c:157
uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
Set the USCI_SPI bus clock. Only available in Master mode.
Definition: usci_spi.c:169
void USPI_EnableWakeup(USPI_T *uspi)
Enable USCI_SPI Wake-up Function.
Definition: usci_spi.c:643
void USPI_DisableWakeup(USPI_T *uspi)
Disable USCI_SPI Wake-up Function.
Definition: usci_spi.c:653
void USPI_DisableInt(USPI_T *uspi, uint32_t u32Mask)
Disable related interrupts specified by u32Mask parameter.
Definition: usci_spi.c:317
void USPI_ClearTxBuf(USPI_T *uspi)
Clear Tx buffer.
Definition: usci_spi.c:133
uint32_t USPI_GetIntFlag(USPI_T *uspi, uint32_t u32Mask)
Get interrupt flag.
Definition: usci_spi.c:399
uint32_t USPI_GetStatus(USPI_T *uspi, uint32_t u32Mask)
Get USCI_SPI status.
Definition: usci_spi.c:583
void USPI_ClearRxBuf(USPI_T *uspi)
Clear Rx buffer.
Definition: usci_spi.c:123
__IO uint32_t CTLIN0
Definition: uspi_reg.h:954
__IO uint32_t PROTSTS
Definition: uspi_reg.h:972
__IO uint32_t WKCTL
Definition: uspi_reg.h:968
__IO uint32_t INTEN
Definition: uspi_reg.h:945
__IO uint32_t BUFCTL
Definition: uspi_reg.h:962
__IO uint32_t PROTIEN
Definition: uspi_reg.h:971
__IO uint32_t LINECTL
Definition: uspi_reg.h:959
__IO uint32_t BRGEN
Definition: uspi_reg.h:946
__IO uint32_t PROTCTL
Definition: uspi_reg.h:970
__IO uint32_t CTL
Definition: uspi_reg.h:944
__IO uint32_t BUFSTS
Definition: uspi_reg.h:963