M480 BSP V3.05.005
The Board Support Package for M480 Series
pdma.h
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1/**************************************************************************/
9#ifndef __PDMA_H__
10#define __PDMA_H__
11
12#ifdef __cplusplus
13extern "C"
14{
15#endif
16
17
29#define PDMA_CH_MAX 16UL
31/*---------------------------------------------------------------------------------------------------------*/
32/* Operation Mode Constant Definitions */
33/*---------------------------------------------------------------------------------------------------------*/
34#define PDMA_OP_STOP 0x00000000UL
35#define PDMA_OP_BASIC 0x00000001UL
36#define PDMA_OP_SCATTER 0x00000002UL
38/*---------------------------------------------------------------------------------------------------------*/
39/* Data Width Constant Definitions */
40/*---------------------------------------------------------------------------------------------------------*/
41#define PDMA_WIDTH_8 0x00000000UL
42#define PDMA_WIDTH_16 0x00001000UL
43#define PDMA_WIDTH_32 0x00002000UL
45/*---------------------------------------------------------------------------------------------------------*/
46/* Address Attribute Constant Definitions */
47/*---------------------------------------------------------------------------------------------------------*/
48#define PDMA_SAR_INC 0x00000000UL
49#define PDMA_SAR_FIX 0x00000300UL
50#define PDMA_DAR_INC 0x00000000UL
51#define PDMA_DAR_FIX 0x00000C00UL
53/*---------------------------------------------------------------------------------------------------------*/
54/* Burst Mode Constant Definitions */
55/*---------------------------------------------------------------------------------------------------------*/
56#define PDMA_REQ_SINGLE 0x00000004UL
57#define PDMA_REQ_BURST 0x00000000UL
59#define PDMA_BURST_128 0x00000000UL
60#define PDMA_BURST_64 0x00000010UL
61#define PDMA_BURST_32 0x00000020UL
62#define PDMA_BURST_16 0x00000030UL
63#define PDMA_BURST_8 0x00000040UL
64#define PDMA_BURST_4 0x00000050UL
65#define PDMA_BURST_2 0x00000060UL
66#define PDMA_BURST_1 0x00000070UL
68/*---------------------------------------------------------------------------------------------------------*/
69/* Table Interrupt Disable Constant Definitions */
70/*---------------------------------------------------------------------------------------------------------*/
71#define PDMA_TBINTDIS_ENABLE (0x0UL<<PDMA_DSCT_CTL_TBINTDIS_Pos)
72#define PDMA_TBINTDIS_DISABLE (0x1UL<<PDMA_DSCT_CTL_TBINTDIS_Pos)
74/*---------------------------------------------------------------------------------------------------------*/
75/* Peripheral Transfer Mode Constant Definitions */
76/*---------------------------------------------------------------------------------------------------------*/
77#define PDMA_MEM 0UL
78#define PDMA_USB_TX 2UL
79#define PDMA_USB_RX 3UL
80#define PDMA_UART0_TX 4UL
81#define PDMA_UART0_RX 5UL
82#define PDMA_UART1_TX 6UL
83#define PDMA_UART1_RX 7UL
84#define PDMA_UART2_TX 8UL
85#define PDMA_UART2_RX 9UL
86#define PDMA_UART3_TX 10UL
87#define PDMA_UART3_RX 11UL
88#define PDMA_UART4_TX 12UL
89#define PDMA_UART4_RX 13UL
90#define PDMA_UART5_TX 14UL
91#define PDMA_UART5_RX 15UL
92#define PDMA_USCI0_TX 16UL
93#define PDMA_USCI0_RX 17UL
94#define PDMA_USCI1_TX 18UL
95#define PDMA_USCI1_RX 19UL
96#define PDMA_QSPI0_TX 20UL
97#define PDMA_QSPI0_RX 21UL
98#define PDMA_SPI0_TX 22UL
99#define PDMA_SPI0_RX 23UL
100#define PDMA_SPI1_TX 24UL
101#define PDMA_SPI1_RX 25UL
102#define PDMA_SPI2_TX 26UL
103#define PDMA_SPI2_RX 27UL
104#define PDMA_SPI3_TX 28UL
105#define PDMA_SPI3_RX 29UL
106#define PDMA_QSPI1_TX 30UL
107#define PDMA_QSPI1_RX 31UL
108#define PDMA_EPWM0_P1_RX 32UL
109#define PDMA_EPWM0_P2_RX 33UL
110#define PDMA_EPWM0_P3_RX 34UL
111#define PDMA_EPWM1_P1_RX 35UL
112#define PDMA_EPWM1_P2_RX 36UL
113#define PDMA_EPWM1_P3_RX 37UL
114#define PDMA_I2C0_TX 38UL
115#define PDMA_I2C0_RX 39UL
116#define PDMA_I2C1_TX 40UL
117#define PDMA_I2C1_RX 41UL
118#define PDMA_I2C2_TX 42UL
119#define PDMA_I2C2_RX 43UL
120#define PDMA_I2S0_TX 44UL
121#define PDMA_I2S0_RX 45UL
122#define PDMA_TMR0 46UL
123#define PDMA_TMR1 47UL
124#define PDMA_TMR2 48UL
125#define PDMA_TMR3 49UL
126#define PDMA_EADC0_RX 50UL
127#define PDMA_DAC0_TX 51UL
128#define PDMA_DAC1_TX 52UL
129#define PDMA_EPWM0_CH0_TX 53UL
130#define PDMA_EPWM0_CH1_TX 54UL
131#define PDMA_EPWM0_CH2_TX 55UL
132#define PDMA_EPWM0_CH3_TX 56UL
133#define PDMA_EPWM0_CH4_TX 57UL
134#define PDMA_EPWM0_CH5_TX 58UL
135#define PDMA_EPWM1_CH0_TX 59UL
136#define PDMA_EPWM1_CH1_TX 60UL
137#define PDMA_EPWM1_CH2_TX 61UL
138#define PDMA_EPWM1_CH3_TX 62UL
139#define PDMA_EPWM1_CH4_TX 63UL
140#define PDMA_EPWM1_CH5_TX 64UL
141#define PDMA_UART6_TX 66UL
142#define PDMA_UART6_RX 67UL
143#define PDMA_UART7_TX 68UL
144#define PDMA_UART7_RX 69UL
145#define PDMA_EADC1_RX 70UL
146/*---------------------------------------------------------------------------------------------------------*/
147/* Interrupt Type Constant Definitions */
148/*---------------------------------------------------------------------------------------------------------*/
149#define PDMA_INT_TRANS_DONE 0x00000000UL
150#define PDMA_INT_TEMPTY 0x00000001UL
151#define PDMA_INT_TIMEOUT 0x00000002UL /* end of group PDMA_EXPORTED_CONSTANTS */
155
170#define PDMA_GET_INT_STATUS(pdma) ((uint32_t)(pdma->INTSTS))
171
182#define PDMA_GET_TD_STS(pdma) ((uint32_t)(pdma->TDSTS))
183
196#define PDMA_CLR_TD_FLAG(pdma,u32Mask) ((uint32_t)(pdma->TDSTS = (u32Mask)))
197
208#define PDMA_GET_ABORT_STS(pdma) ((uint32_t)(pdma->ABTSTS))
209
222#define PDMA_CLR_ABORT_FLAG(pdma,u32Mask) ((uint32_t)(pdma->ABTSTS = (u32Mask)))
223
234#define PDMA_GET_ALIGN_STS(pdma) ((uint32_t)(PDMA->ALIGN))
235
247#define PDMA_CLR_ALIGN_FLAG(pdma,u32Mask) ((uint32_t)(pdma->ALIGN = (u32Mask)))
248
260#define PDMA_CLR_TMOUT_FLAG(pdma,u32Ch) ((uint32_t)(pdma->INTSTS = (1 << ((u32Ch) + 8))))
261
274#define PDMA_IS_CH_BUSY(pdma,u32Ch) ((uint32_t)(pdma->TRGSTS & (1 << (u32Ch)))? 1 : 0)
275
288#define PDMA_SET_SRC_ADDR(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].SA = (u32Addr)))
289
302#define PDMA_SET_DST_ADDR(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].DA = (u32Addr)))
303
316#define PDMA_SET_TRANS_CNT(pdma,u32Ch, u32TransCount) ((uint32_t)(pdma->DSCT[(u32Ch)].CTL=(pdma->DSCT[(u32Ch)].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|(((u32TransCount)-1) << PDMA_DSCT_CTL_TXCNT_Pos)))
317
330#define PDMA_SET_SCATTER_DESC(pdma,u32Ch, u32Addr) ((uint32_t)(pdma->DSCT[(u32Ch)].NEXT = (u32Addr) - (pdma->SCATBA)))
331
344#define PDMA_STOP(pdma,u32Ch) ((uint32_t)(pdma->PAUSE = (1 << (u32Ch))))
345
358#define PDMA_PAUSE(pdma,u32Ch) ((uint32_t)(pdma->PAUSE = (1 << (u32Ch))))
359
360/*---------------------------------------------------------------------------------------------------------*/
361/* Define PDMA functions prototype */
362/*---------------------------------------------------------------------------------------------------------*/
363void PDMA_Open(PDMA_T * pdma,uint32_t u32Mask);
364void PDMA_Close(PDMA_T * pdma);
365void PDMA_SetTransferCnt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
366void PDMA_SetTransferAddr(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
367void PDMA_SetTransferMode(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
368void PDMA_SetBurstType(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
369void PDMA_EnableTimeout(PDMA_T * pdma,uint32_t u32Mask);
370void PDMA_DisableTimeout(PDMA_T * pdma,uint32_t u32Mask);
371void PDMA_SetTimeOut(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt);
372void PDMA_Trigger(PDMA_T * pdma,uint32_t u32Ch);
373void PDMA_EnableInt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Mask);
374void PDMA_DisableInt(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32Mask);
375void PDMA_SetStride(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32DestLen, uint32_t u32SrcLen, uint32_t u32TransCount);
376void PDMA_SetRepeat(PDMA_T * pdma,uint32_t u32Ch, uint32_t u32DestInterval, uint32_t u32SrcInterval, uint32_t u32RepeatCount);
377
378 /* end of group PDMA_EXPORTED_FUNCTIONS */
380 /* end of group PDMA_Driver */
382 /* end of group Standard_Driver */
384
385#ifdef __cplusplus
386}
387#endif
388
389#endif /* __PDMA_H__ */
390
391/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
void PDMA_DisableTimeout(PDMA_T *pdma, uint32_t u32Mask)
Disable timeout function.
Definition: pdma.c:358
void PDMA_SetBurstType(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
Set PDMA Burst Type and Size.
Definition: pdma.c:325
void PDMA_Trigger(PDMA_T *pdma, uint32_t u32Ch)
Trigger PDMA.
Definition: pdma.c:406
void PDMA_Close(PDMA_T *pdma)
PDMA Close.
Definition: pdma.c:63
void PDMA_SetTimeOut(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt)
Set PDMA Timeout Count.
Definition: pdma.c:376
void PDMA_DisableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask)
Disable Interrupt.
Definition: pdma.c:462
void PDMA_Open(PDMA_T *pdma, uint32_t u32Mask)
PDMA Open.
Definition: pdma.c:38
void PDMA_SetTransferMode(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
Set PDMA Transfer Mode.
Definition: pdma.c:235
void PDMA_SetTransferAddr(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
Set PDMA Transfer Address.
Definition: pdma.c:147
void PDMA_SetStride(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32DestLen, uint32_t u32SrcLen, uint32_t u32TransCount)
Set PDMA Stride Mode.
Definition: pdma.c:102
void PDMA_SetTransferCnt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
Set PDMA Transfer Count.
Definition: pdma.c:83
void PDMA_SetRepeat(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32DestInterval, uint32_t u32SrcInterval, uint32_t u32RepeatCount)
Set PDMA Repeat.
Definition: pdma.c:122
void PDMA_EnableTimeout(PDMA_T *pdma, uint32_t u32Mask)
Enable timeout function.
Definition: pdma.c:342
void PDMA_EnableInt(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Mask)
Enable Interrupt.
Definition: pdma.c:429