33#define I2S_DATABIT_8 (0 << I2S_CTL_WDWIDTH_Pos)
34#define I2S_DATABIT_16 (1 << I2S_CTL_WDWIDTH_Pos)
35#define I2S_DATABIT_24 (2 << I2S_CTL_WDWIDTH_Pos)
36#define I2S_DATABIT_32 (3 << I2S_CTL_WDWIDTH_Pos)
39#define I2S_MONO I2S_CTL_MONO_Msk
43#define I2S_FORMAT_MSB I2S_CTL_FORMAT_Msk
44#define I2S_FORMAT_I2S 0
45#define I2S_FORMAT_PCMB I2S_CTL_FORMAT_Msk
46#define I2S_FORMAT_PCMA 0
49#define I2S_PCM I2S_CTL_PCMEN_Msk
53#define I2S_MODE_SLAVE I2S_CTL_SLAVE_Msk
54#define I2S_MODE_MASTER 0
57#define I2S_FIFO_TX_LEVEL_WORD_0 0
58#define I2S_FIFO_TX_LEVEL_WORD_1 (1 << I2S_CTL_TXTH_Pos)
59#define I2S_FIFO_TX_LEVEL_WORD_2 (2 << I2S_CTL_TXTH_Pos)
60#define I2S_FIFO_TX_LEVEL_WORD_3 (3 << I2S_CTL_TXTH_Pos)
61#define I2S_FIFO_TX_LEVEL_WORD_4 (4 << I2S_CTL_TXTH_Pos)
62#define I2S_FIFO_TX_LEVEL_WORD_5 (5 << I2S_CTL_TXTH_Pos)
63#define I2S_FIFO_TX_LEVEL_WORD_6 (6 << I2S_CTL_TXTH_Pos)
64#define I2S_FIFO_TX_LEVEL_WORD_7 (7 << I2S_CTL_TXTH_Pos)
66#define I2S_FIFO_RX_LEVEL_WORD_1 0
67#define I2S_FIFO_RX_LEVEL_WORD_2 (1 << I2S_CTL_RXTH_Pos)
68#define I2S_FIFO_RX_LEVEL_WORD_3 (2 << I2S_CTL_RXTH_Pos)
69#define I2S_FIFO_RX_LEVEL_WORD_4 (3 << I2S_CTL_RXTH_Pos)
70#define I2S_FIFO_RX_LEVEL_WORD_5 (4 << I2S_CTL_RXTH_Pos)
71#define I2S_FIFO_RX_LEVEL_WORD_6 (5 << I2S_CTL_RXTH_Pos)
72#define I2S_FIFO_RX_LEVEL_WORD_7 (6 << I2S_CTL_RXTH_Pos)
73#define I2S_FIFO_RX_LEVEL_WORD_8 (7 << I2S_CTL_RXTH_Pos)
76#define I2S_MONO_RIGHT 0
77#define I2S_MONO_LEFT I2S_CTL_RXLCH_Msk
120 i2s->
CTL &= ~I2S_CTL_RZCEN_Msk;
122 i2s->
CTL &= ~I2S_CTL_LZCEN_Msk;
131#define I2S_ENABLE_TXDMA(i2s) ( (i2s)->CTL |= I2S_CTL_TXPDMAEN_Msk )
139#define I2S_DISABLE_TXDMA(i2s) ( (i2s)->CTL &= ~I2S_CTL_TXPDMAEN_Msk )
147#define I2S_ENABLE_RXDMA(i2s) ( (i2s)->CTL |= I2S_CTL_RXPDMAEN_Msk )
155#define I2S_DISABLE_RXDMA(i2s) ( (i2s)->CTL &= ~I2S_CTL_RXPDMAEN_Msk )
163#define I2S_ENABLE_TX(i2s) ( (i2s)->CTL |= I2S_CTL_TXEN_Msk )
171#define I2S_DISABLE_TX(i2s) ( (i2s)->CTL &= ~I2S_CTL_TXEN_Msk )
179#define I2S_ENABLE_RX(i2s) ( (i2s)->CTL |= I2S_CTL_RXEN_Msk )
187#define I2S_DISABLE_RX(i2s) ( (i2s)->CTL &= ~I2S_CTL_RXEN_Msk )
195#define I2S_ENABLE_TX_MUTE(i2s) ( (i2s)->CTL |= I2S_CTL_MUTE_Msk )
203#define I2S_DISABLE_TX_MUTE(i2s) ( (i2s)->CTL &= ~I2S_CTL_MUTE_Msk )
211#define I2S_CLR_TX_FIFO(i2s) ( (i2s)->CTL |= I2S_CTL_TXCLR_Msk )
219#define I2S_CLR_RX_FIFO(i2s) ( (i2s)->CTL |= I2S_CTL_RXCLR_Msk )
244#define I2S_WRITE_TX_FIFO(i2s, u32Data) ( (i2s)->TX = u32Data )
252#define I2S_READ_RX_FIFO(i2s) ( (i2s)->RX )
261#define I2S_GET_INT_FLAG(i2s, u32Mask) ( (i2s)->STATUS & (u32Mask) )
270#define I2S_CLR_INT_FLAG(i2s, u32Mask) ( (i2s)->STATUS |= (u32Mask) )
278#define I2S_GET_TX_FIFO_LEVEL(i2s) ( (((i2s)->STATUS & I2S_STATUS_TXCNT_Msk) >> I2S_STATUS_TXCNT_Pos) & 0xF )
286#define I2S_GET_RX_FIFO_LEVEL(i2s) ( (((i2s)->STATUS & I2S_STATUS_RXCNT_Msk) >> I2S_STATUS_RXCNT_Pos) & 0xF )
288uint32_t
I2S_Open(
I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface);
294void I2S_SetFIFO(
I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold);
NUC472/NUC442 peripheral access layer header file. This file contains all the peripheral register's d...
#define I2S_CTL_LZCEN_Msk
#define I2S_CTL_RZCEN_Msk
#define I2S_CTL_RXLCH_Msk
void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
static __INLINE void I2S_SET_MONO_RX_CHANNEL(I2S_T *i2s, uint32_t u32Ch)
This function sets the recording source channel when mono mode is used.
static __INLINE void I2S_ENABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
Enable zero cross detect function.
uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
This function configures some parameters of I2S interface for general purpose use....
void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
This function disables the interrupt according to the mask parameter.
static __INLINE void I2S_DISABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
Disable zero cross detect function.
void I2S_DisableMCLK(I2S_T *i2s)
Disable MCLK .
uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
Enable MCLK .
void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
This function enables the interrupt according to the mask parameter.
void I2S_Close(I2S_T *i2s)
Disable I2S function and I2S clock.