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Nano102_112 Series BSP
V3.03.002
The Board Support Package for Nano102_112 Series
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Macros | |
#define | ACMP_CR_CN_PIN (0<<24) |
The comparator reference pin CPN0/1 is selected. More... | |
#define | ACMP_CR_CN_CRV (1<<24) |
The internal comparator reference voltage (CRV) is selected. More... | |
#define | ACMP_CR_CN_VREFI (2<<24) |
The internal reference voltage (VREFI) is selected. More... | |
#define | ACMP_CR_CN_AGND (3<<24) |
The AGND is selected */. More... | |
#define | ACMP_CR_ACMP_HYSTERSIS_ENABLE ACMP_CR_ACMP_HYSEN_Msk |
ACMP hysteresis enable. More... | |
#define | ACMP_CR_ACMP_HYSTERSIS_DISABLE 0 |
ACMP hysteresis disable. More... | |
#define | ACMP_CR_CPP0SEL_PA1 (3UL<<ACMP_CR_CPP0SEL_Pos) |
The comparator positive input select PA1. More... | |
#define | ACMP_CR_CPP0SEL_PA2 (2UL<<ACMP_CR_CPP0SEL_Pos) |
The comparator positive input select PA2. More... | |
#define | ACMP_CR_CPP0SEL_PA3 (1UL<<ACMP_CR_CPP0SEL_Pos) |
The comparator positive input select PA3. More... | |
#define | ACMP_CR_CPP0SEL_PA4 (0UL<<ACMP_CR_CPP0SEL_Pos) |
The comparator positive input select PA4. More... | |
#define | ACMP_MODCR0_TMR_TRI_LV_RISING (0UL<<ACMP_MODCR0_TMR_TRI_LV_Pos) |
The comparator output low to high to enable timer. More... | |
#define | ACMP_MODCR0_TMR_TRI_LV_FALLING (1UL<<ACMP_MODCR0_TMR_TRI_LV_Pos) |
The comparator output high to low to enable timer. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA1 (0UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA1. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA2 (1UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA2. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA3 (2UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA3. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA4 (3UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA4. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA5 (4UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA5. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA6 (5UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA6. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PA14 (6UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PA14. More... | |
#define | ACMP_MODCR0_CH_DIS_PINSEL_PF5 (7UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
The charge/discharge pin select PF5. More... | |
#define | ACMP_MODCR0_MOD_SEL_NORMAL (0UL<<ACMP_MODCR0_MOD_SEL_Pos) |
The comparator mode select normal mode. More... | |
#define | ACMP_MODCR0_MOD_SEL_SIGAMA_DELTA (1UL<<ACMP_MODCR0_MOD_SEL_Pos) |
The comparator mode select sigma-delta mode. More... | |
#define | ACMP_MODCR0_MOD_SEL_SLOPE (2UL<<ACMP_MODCR0_MOD_SEL_Pos) |
The comparator mode select slope mode. More... | |
#define | ACMP_TIMER01 (0UL<<ACMP_MODCR0_TMR_SEL_Pos) |
ACMP use timer0 and timer1. More... | |
#define | ACMP_TIMER23 (1UL<<ACMP_MODCR0_TMR_SEL_Pos) |
ACMP use timer2 and timer3. More... | |
#define ACMP_CR_ACMP_HYSTERSIS_DISABLE 0 |
#define ACMP_CR_ACMP_HYSTERSIS_ENABLE ACMP_CR_ACMP_HYSEN_Msk |
#define ACMP_CR_CN_CRV (1<<24) |
#define ACMP_CR_CN_PIN (0<<24) |
#define ACMP_CR_CN_VREFI (2<<24) |
#define ACMP_CR_CPP0SEL_PA1 (3UL<<ACMP_CR_CPP0SEL_Pos) |
#define ACMP_CR_CPP0SEL_PA2 (2UL<<ACMP_CR_CPP0SEL_Pos) |
#define ACMP_CR_CPP0SEL_PA3 (1UL<<ACMP_CR_CPP0SEL_Pos) |
#define ACMP_CR_CPP0SEL_PA4 (0UL<<ACMP_CR_CPP0SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA1 (0UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA14 (6UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA2 (1UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA3 (2UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA4 (3UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA5 (4UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PA6 (5UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_CH_DIS_PINSEL_PF5 (7UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos) |
#define ACMP_MODCR0_MOD_SEL_NORMAL (0UL<<ACMP_MODCR0_MOD_SEL_Pos) |
#define ACMP_MODCR0_MOD_SEL_SIGAMA_DELTA (1UL<<ACMP_MODCR0_MOD_SEL_Pos) |
#define ACMP_MODCR0_MOD_SEL_SLOPE (2UL<<ACMP_MODCR0_MOD_SEL_Pos) |
#define ACMP_MODCR0_TMR_TRI_LV_FALLING (1UL<<ACMP_MODCR0_TMR_TRI_LV_Pos) |
#define ACMP_MODCR0_TMR_TRI_LV_RISING (0UL<<ACMP_MODCR0_TMR_TRI_LV_Pos) |
#define ACMP_TIMER01 (0UL<<ACMP_MODCR0_TMR_SEL_Pos) |