NANO100_BSP V3.04.002
The Board Support Package for Nano100BN Series
i2s.c
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1/**************************************************************************/
13#include <stdio.h>
14#include "Nano100Series.h"
15
29
34static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
35{
36 uint32_t u32Freq, u32ClkSrcSel;
37
38 // get I2S selection clock source
39 u32ClkSrcSel = CLK->CLKSEL2 & CLK_CLKSEL2_I2S_S_Msk;
40
41 switch (u32ClkSrcSel)
42 {
44 u32Freq = __HXT;
45 break;
46
48 u32Freq = CLK_GetPLLClockFreq();
49 break;
50
52 u32Freq = __HIRC;
53 break;
54
55 default:
56 u32Freq = __HIRC;
57 break;
58 }
59
60 return u32Freq;
61}
63
88uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
89{
90 uint8_t u8Divider;
91 uint32_t u32BitRate, u32SrcClk;
92
93 SYS->IPRST_CTL2 |= SYS_IPRST_CTL2_I2S_RST_Msk;
94 SYS->IPRST_CTL2 &= ~SYS_IPRST_CTL2_I2S_RST_Msk;
95
96 i2s->CTRL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat | u32AudioInterface | I2S_FIFO_TX_LEVEL_WORD_4 | I2S_FIFO_RX_LEVEL_WORD_4;
97
98 u32SrcClk = I2S_GetSourceClockFreq(i2s);
99
100 u32BitRate = u32SampleRate * (((u32WordWidth>>4) & 0x3) + 1) * 16;
101 u8Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
102 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLK_DIV_Msk) | (u8Divider << 8);
103
104 //calculate real sample rate
105 u32BitRate = u32SrcClk / (2*(u8Divider+1));
106 u32SampleRate = u32BitRate / ((((u32WordWidth>>4) & 0x3) + 1) * 16);
107
108 i2s->CTRL |= I2S_CTRL_I2SEN_Msk;
109
110 return u32SampleRate;
111}
112
118void I2S_Close(I2S_T *i2s)
119{
120 i2s->CTRL &= ~I2S_CTRL_I2SEN_Msk;
121}
122
130void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
131{
132 i2s->INTEN |= u32Mask;
133}
134
142void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
143{
144 i2s->INTEN &= ~u32Mask;
145}
146
153uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
154{
155 uint8_t u8Divider;
156 uint32_t u32SrcClk, u32Reg;
157
158 u32SrcClk = I2S_GetSourceClockFreq(i2s);
159 if (u32BusClock == u32SrcClk)
160 u8Divider = 0;
161 else
162 u8Divider = (u32SrcClk/u32BusClock) >> 1;
163
164 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLK_DIV_Msk) | u8Divider;
165
167
168 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLK_DIV_Msk;
169
170 if (u32Reg == 0)
171 return u32SrcClk;
172 else
173 return ((u32SrcClk >> 1) / u32Reg);
174}
175
182{
183 i2s->CTRL &= ~I2S_CTRL_MCLKEN_Msk;
184}
185
194void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
195{
196 i2s->CTRL = (i2s->CTRL & ~(I2S_CTRL_TXTH_Msk | I2S_CTRL_RXTH_Msk) |
197 (u32TxThreshold << I2S_CTRL_TXTH_Pos) |
198 (u32RxThreshold << I2S_CTRL_RXTH_Pos));
199} /* end of group NANO100_I2S_EXPORTED_FUNCTIONS */
201 /* end of group NANO100_I2S_Driver */
203 /* end of group NANO100_Device_Driver */
205
206/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
Nano100 series peripheral access layer header file. This file contains all the peripheral register's ...
#define I2S_CTRL_I2SEN_Msk
#define I2S_CTRL_RXTH_Pos
#define I2S_CTRL_MCLKEN_Msk
#define I2S_CTRL_TXTH_Pos
#define SYS_IPRST_CTL2_I2S_RST_Msk
#define I2S_CTRL_RXTH_Msk
#define I2S_CLKDIV_MCLK_DIV_Msk
#define I2S_CTRL_TXTH_Msk
#define CLK_CLKSEL2_I2S_S_PLL
Definition: clk.h:157
#define CLK_CLKSEL2_I2S_S_HIRC
Definition: clk.h:158
#define CLK_CLKSEL2_I2S_S_HXT
Definition: clk.h:156
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
Definition: clk.c:142
#define CLK_CLKSEL2_I2S_S_Msk
#define I2S_FIFO_TX_LEVEL_WORD_4
Definition: i2s.h:56
#define I2S_FIFO_RX_LEVEL_WORD_4
Definition: i2s.h:64
void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
Definition: i2s.c:194
uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
This function configures some parameters of I2S interface for general purpose use....
Definition: i2s.c:88
void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
This function disables the interrupt according to the mask parameter.
Definition: i2s.c:142
void I2S_DisableMCLK(I2S_T *i2s)
Disable MCLK .
Definition: i2s.c:181
uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
Enable MCLK .
Definition: i2s.c:153
void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
This function enables the interrupt according to the mask parameter.
Definition: i2s.c:130
void I2S_Close(I2S_T *i2s)
Disable I2S function and I2S clock.
Definition: i2s.c:118
#define CLK
Pointer to CLK register structure.
#define SYS
Pointer to SYS register structure.
__IO uint32_t CTRL
__IO uint32_t INTEN
__IO uint32_t CLKDIV
#define __HIRC
#define __HXT