M480 BSP V3.05.005
The Board Support Package for M480 Series
Modules | Macros

Modules

 I/O Routines
 

Macros

#define SYS   ((SYS_T *) SYS_BASE)
 
#define CLK   ((CLK_T *) CLK_BASE)
 
#define NMI   ((NMI_T *) NMI_BASE)
 
#define PA   ((GPIO_T *) GPIOA_BASE)
 
#define PB   ((GPIO_T *) GPIOB_BASE)
 
#define PC   ((GPIO_T *) GPIOC_BASE)
 
#define PD   ((GPIO_T *) GPIOD_BASE)
 
#define PE   ((GPIO_T *) GPIOE_BASE)
 
#define PF   ((GPIO_T *) GPIOF_BASE)
 
#define PG   ((GPIO_T *) GPIOG_BASE)
 
#define PH   ((GPIO_T *) GPIOH_BASE)
 
#define GPA   ((GPIO_T *) GPIOA_BASE)
 
#define GPB   ((GPIO_T *) GPIOB_BASE)
 
#define GPC   ((GPIO_T *) GPIOC_BASE)
 
#define GPD   ((GPIO_T *) GPIOD_BASE)
 
#define GPE   ((GPIO_T *) GPIOE_BASE)
 
#define GPF   ((GPIO_T *) GPIOF_BASE)
 
#define GPG   ((GPIO_T *) GPIOG_BASE)
 
#define GPH   ((GPIO_T *) GPIOH_BASE)
 
#define GPIO   ((GPIO_DBCTL_T *) GPIO_DBCTL_BASE)
 
#define PDMA   ((PDMA_T *) PDMA_BASE)
 
#define USBH   ((USBH_T *) USBH_BASE)
 
#define HSUSBH   ((HSUSBH_T *) HSUSBH_BASE)
 
#define EMAC   ((EMAC_T *) EMAC_BASE)
 
#define FMC   ((FMC_T *) FMC_BASE)
 
#define SDH0   ((SDH_T *) SDH0_BASE)
 
#define SDH1   ((SDH_T *) SDH1_BASE)
 
#define EBI   ((EBI_T *) EBI_BASE)
 
#define CRC   ((CRC_T *) CRC_BASE)
 
#define TAMPER   ((TAMPER_T *) TAMPER_BASE)
 
#define WDT   ((WDT_T *) WDT_BASE)
 
#define WWDT   ((WWDT_T *) WWDT_BASE)
 
#define RTC   ((RTC_T *) RTC_BASE)
 
#define EADC   ((EADC_T *) EADC_BASE)
 
#define EADC0   ((EADC_T *) EADC_BASE)
 
#define EADC1   ((EADC_T *) EADC1_BASE)
 
#define ACMP01   ((ACMP_T *) ACMP01_BASE)
 
#define I2S0   ((I2S_T *) I2S_BASE)
 
#define USBD   ((USBD_T *) USBD_BASE)
 
#define OTG   ((OTG_T *) OTG_BASE)
 
#define HSUSBD   ((HSUSBD_T *)HSUSBD_BASE)
 
#define HSOTG   ((HSOTG_T *) HSOTG_BASE)
 
#define TIMER0   ((TIMER_T *) TIMER0_BASE)
 
#define TIMER1   ((TIMER_T *) TIMER1_BASE)
 
#define TIMER2   ((TIMER_T *) TIMER2_BASE)
 
#define TIMER3   ((TIMER_T *) TIMER3_BASE)
 
#define EPWM0   ((EPWM_T *) EPWM0_BASE)
 
#define EPWM1   ((EPWM_T *) EPWM1_BASE)
 
#define BPWM0   ((BPWM_T *) BPWM0_BASE)
 
#define BPWM1   ((BPWM_T *) BPWM1_BASE)
 
#define ECAP0   ((ECAP_T *) ECAP0_BASE)
 
#define ECAP1   ((ECAP_T *) ECAP1_BASE)
 
#define QEI0   ((QEI_T *) QEI0_BASE)
 
#define QEI1   ((QEI_T *) QEI1_BASE)
 
#define QSPI0   ((QSPI_T *) QSPI0_BASE)
 
#define QSPI1   ((QSPI_T *) QSPI1_BASE)
 
#define SPI0   ((SPI_T *) SPI0_BASE)
 
#define SPI1   ((SPI_T *) SPI1_BASE)
 
#define SPI2   ((SPI_T *) SPI2_BASE)
 
#define SPI3   ((SPI_T *) SPI3_BASE)
 
#define UART0   ((UART_T *) UART0_BASE)
 
#define UART1   ((UART_T *) UART1_BASE)
 
#define UART2   ((UART_T *) UART2_BASE)
 
#define UART3   ((UART_T *) UART3_BASE)
 
#define UART4   ((UART_T *) UART4_BASE)
 
#define UART5   ((UART_T *) UART5_BASE)
 
#define UART6   ((UART_T *) UART6_BASE)
 
#define UART7   ((UART_T *) UART7_BASE)
 
#define I2C0   ((I2C_T *) I2C0_BASE)
 
#define I2C1   ((I2C_T *) I2C1_BASE)
 
#define I2C2   ((I2C_T *) I2C2_BASE)
 
#define SC0   ((SC_T *) SC0_BASE)
 
#define SC1   ((SC_T *) SC1_BASE)
 
#define SC2   ((SC_T *) SC2_BASE)
 
#define CAN0   ((CAN_T *) CAN0_BASE)
 
#define CAN1   ((CAN_T *) CAN1_BASE)
 
#define CAN2   ((CAN_T *) CAN2_BASE)
 
#define CRPT   ((CRPT_T *) CRPT_BASE)
 
#define TRNG   ((TRNG_T *) TRNG_BASE)
 
#define SPIM   ((volatile SPIM_T *) SPIM_BASE)
 
#define DAC0   ((DAC_T *) DAC0_BASE)
 
#define DAC1   ((DAC_T *) DAC1_BASE)
 
#define USPI0   ((USPI_T *) USCI0_BASE)
 
#define USPI1   ((USPI_T *) USCI1_BASE)
 
#define OPA   ((OPA_T *) OPA_BASE)
 
#define UI2C0   ((UI2C_T *) USCI0_BASE)
 
#define UI2C1   ((UI2C_T *) USCI1_BASE)
 
#define UUART0   ((UUART_T *) USCI0_BASE)
 
#define UUART1   ((UUART_T *) USCI1_BASE)
 
#define CCAP   ((CCAP_T *) CCAP_BASE)
 

Detailed Description

The Declaration of Peripherals

Macro Definition Documentation

◆ ACMP01

#define ACMP01   ((ACMP_T *) ACMP01_BASE)

Definition at line 404 of file M480.h.

◆ BPWM0

#define BPWM0   ((BPWM_T *) BPWM0_BASE)

Definition at line 417 of file M480.h.

◆ BPWM1

#define BPWM1   ((BPWM_T *) BPWM1_BASE)

Definition at line 418 of file M480.h.

◆ CAN0

#define CAN0   ((CAN_T *) CAN0_BASE)

Definition at line 443 of file M480.h.

◆ CAN1

#define CAN1   ((CAN_T *) CAN1_BASE)

Definition at line 444 of file M480.h.

◆ CAN2

#define CAN2   ((CAN_T *) CAN2_BASE)

Definition at line 445 of file M480.h.

◆ CCAP

#define CCAP   ((CCAP_T *) CCAP_BASE)

Definition at line 458 of file M480.h.

◆ CLK

#define CLK   ((CLK_T *) CLK_BASE)

Definition at line 368 of file M480.h.

◆ CRC

#define CRC   ((CRC_T *) CRC_BASE)

Definition at line 395 of file M480.h.

◆ CRPT

#define CRPT   ((CRPT_T *) CRPT_BASE)

Definition at line 446 of file M480.h.

◆ DAC0

#define DAC0   ((DAC_T *) DAC0_BASE)

Definition at line 449 of file M480.h.

◆ DAC1

#define DAC1   ((DAC_T *) DAC1_BASE)

Definition at line 450 of file M480.h.

◆ EADC

#define EADC   ((EADC_T *) EADC_BASE)

Definition at line 401 of file M480.h.

◆ EADC0

#define EADC0   ((EADC_T *) EADC_BASE)

Definition at line 402 of file M480.h.

◆ EADC1

#define EADC1   ((EADC_T *) EADC1_BASE)

Definition at line 403 of file M480.h.

◆ EBI

#define EBI   ((EBI_T *) EBI_BASE)

Definition at line 394 of file M480.h.

◆ ECAP0

#define ECAP0   ((ECAP_T *) ECAP0_BASE)

Definition at line 419 of file M480.h.

◆ ECAP1

#define ECAP1   ((ECAP_T *) ECAP1_BASE)

Definition at line 420 of file M480.h.

◆ EMAC

#define EMAC   ((EMAC_T *) EMAC_BASE)

Definition at line 390 of file M480.h.

◆ EPWM0

#define EPWM0   ((EPWM_T *) EPWM0_BASE)

Definition at line 415 of file M480.h.

◆ EPWM1

#define EPWM1   ((EPWM_T *) EPWM1_BASE)

Definition at line 416 of file M480.h.

◆ FMC

#define FMC   ((FMC_T *) FMC_BASE)

Definition at line 391 of file M480.h.

◆ GPA

#define GPA   ((GPIO_T *) GPIOA_BASE)

Definition at line 378 of file M480.h.

◆ GPB

#define GPB   ((GPIO_T *) GPIOB_BASE)

Definition at line 379 of file M480.h.

◆ GPC

#define GPC   ((GPIO_T *) GPIOC_BASE)

Definition at line 380 of file M480.h.

◆ GPD

#define GPD   ((GPIO_T *) GPIOD_BASE)

Definition at line 381 of file M480.h.

◆ GPE

#define GPE   ((GPIO_T *) GPIOE_BASE)

Definition at line 382 of file M480.h.

◆ GPF

#define GPF   ((GPIO_T *) GPIOF_BASE)

Definition at line 383 of file M480.h.

◆ GPG

#define GPG   ((GPIO_T *) GPIOG_BASE)

Definition at line 384 of file M480.h.

◆ GPH

#define GPH   ((GPIO_T *) GPIOH_BASE)

Definition at line 385 of file M480.h.

◆ GPIO

#define GPIO   ((GPIO_DBCTL_T *) GPIO_DBCTL_BASE)

Definition at line 386 of file M480.h.

◆ HSOTG

#define HSOTG   ((HSOTG_T *) HSOTG_BASE)

Definition at line 410 of file M480.h.

◆ HSUSBD

#define HSUSBD   ((HSUSBD_T *)HSUSBD_BASE)

Definition at line 409 of file M480.h.

◆ HSUSBH

#define HSUSBH   ((HSUSBH_T *) HSUSBH_BASE)

Definition at line 389 of file M480.h.

◆ I2C0

#define I2C0   ((I2C_T *) I2C0_BASE)

Definition at line 437 of file M480.h.

◆ I2C1

#define I2C1   ((I2C_T *) I2C1_BASE)

Definition at line 438 of file M480.h.

◆ I2C2

#define I2C2   ((I2C_T *) I2C2_BASE)

Definition at line 439 of file M480.h.

◆ I2S0

#define I2S0   ((I2S_T *) I2S_BASE)

Definition at line 406 of file M480.h.

◆ NMI

#define NMI   ((NMI_T *) NMI_BASE)

Definition at line 369 of file M480.h.

◆ OPA

#define OPA   ((OPA_T *) OPA_BASE)

Definition at line 453 of file M480.h.

◆ OTG

#define OTG   ((OTG_T *) OTG_BASE)

Definition at line 408 of file M480.h.

◆ PA

#define PA   ((GPIO_T *) GPIOA_BASE)

Definition at line 370 of file M480.h.

◆ PB

#define PB   ((GPIO_T *) GPIOB_BASE)

Definition at line 371 of file M480.h.

◆ PC

#define PC   ((GPIO_T *) GPIOC_BASE)

Definition at line 372 of file M480.h.

◆ PD

#define PD   ((GPIO_T *) GPIOD_BASE)

Definition at line 373 of file M480.h.

◆ PDMA

#define PDMA   ((PDMA_T *) PDMA_BASE)

Definition at line 387 of file M480.h.

◆ PE

#define PE   ((GPIO_T *) GPIOE_BASE)

Definition at line 374 of file M480.h.

◆ PF

#define PF   ((GPIO_T *) GPIOF_BASE)

Definition at line 375 of file M480.h.

◆ PG

#define PG   ((GPIO_T *) GPIOG_BASE)

Definition at line 376 of file M480.h.

◆ PH

#define PH   ((GPIO_T *) GPIOH_BASE)

Definition at line 377 of file M480.h.

◆ QEI0

#define QEI0   ((QEI_T *) QEI0_BASE)

Definition at line 421 of file M480.h.

◆ QEI1

#define QEI1   ((QEI_T *) QEI1_BASE)

Definition at line 422 of file M480.h.

◆ QSPI0

#define QSPI0   ((QSPI_T *) QSPI0_BASE)

Definition at line 423 of file M480.h.

◆ QSPI1

#define QSPI1   ((QSPI_T *) QSPI1_BASE)

Definition at line 424 of file M480.h.

◆ RTC

#define RTC   ((RTC_T *) RTC_BASE)

Definition at line 400 of file M480.h.

◆ SC0

#define SC0   ((SC_T *) SC0_BASE)

Definition at line 440 of file M480.h.

◆ SC1

#define SC1   ((SC_T *) SC1_BASE)

Definition at line 441 of file M480.h.

◆ SC2

#define SC2   ((SC_T *) SC2_BASE)

Definition at line 442 of file M480.h.

◆ SDH0

#define SDH0   ((SDH_T *) SDH0_BASE)

Definition at line 392 of file M480.h.

◆ SDH1

#define SDH1   ((SDH_T *) SDH1_BASE)

Definition at line 393 of file M480.h.

◆ SPI0

#define SPI0   ((SPI_T *) SPI0_BASE)

Definition at line 425 of file M480.h.

◆ SPI1

#define SPI1   ((SPI_T *) SPI1_BASE)

Definition at line 426 of file M480.h.

◆ SPI2

#define SPI2   ((SPI_T *) SPI2_BASE)

Definition at line 427 of file M480.h.

◆ SPI3

#define SPI3   ((SPI_T *) SPI3_BASE)

Definition at line 428 of file M480.h.

◆ SPIM

#define SPIM   ((volatile SPIM_T *) SPIM_BASE)

Definition at line 448 of file M480.h.

◆ SYS

#define SYS   ((SYS_T *) SYS_BASE)

Definition at line 367 of file M480.h.

◆ TAMPER

#define TAMPER   ((TAMPER_T *) TAMPER_BASE)

Definition at line 396 of file M480.h.

◆ TIMER0

#define TIMER0   ((TIMER_T *) TIMER0_BASE)

Definition at line 411 of file M480.h.

◆ TIMER1

#define TIMER1   ((TIMER_T *) TIMER1_BASE)

Definition at line 412 of file M480.h.

◆ TIMER2

#define TIMER2   ((TIMER_T *) TIMER2_BASE)

Definition at line 413 of file M480.h.

◆ TIMER3

#define TIMER3   ((TIMER_T *) TIMER3_BASE)

Definition at line 414 of file M480.h.

◆ TRNG

#define TRNG   ((TRNG_T *) TRNG_BASE)

Definition at line 447 of file M480.h.

◆ UART0

#define UART0   ((UART_T *) UART0_BASE)

Definition at line 429 of file M480.h.

◆ UART1

#define UART1   ((UART_T *) UART1_BASE)

Definition at line 430 of file M480.h.

◆ UART2

#define UART2   ((UART_T *) UART2_BASE)

Definition at line 431 of file M480.h.

◆ UART3

#define UART3   ((UART_T *) UART3_BASE)

Definition at line 432 of file M480.h.

◆ UART4

#define UART4   ((UART_T *) UART4_BASE)

Definition at line 433 of file M480.h.

◆ UART5

#define UART5   ((UART_T *) UART5_BASE)

Definition at line 434 of file M480.h.

◆ UART6

#define UART6   ((UART_T *) UART6_BASE)

Definition at line 435 of file M480.h.

◆ UART7

#define UART7   ((UART_T *) UART7_BASE)

Definition at line 436 of file M480.h.

◆ UI2C0

#define UI2C0   ((UI2C_T *) USCI0_BASE)

UI2C0 Configuration Struct

Definition at line 454 of file M480.h.

◆ UI2C1

#define UI2C1   ((UI2C_T *) USCI1_BASE)

UI2C1 Configuration Struct

Definition at line 455 of file M480.h.

◆ USBD

#define USBD   ((USBD_T *) USBD_BASE)

Definition at line 407 of file M480.h.

◆ USBH

#define USBH   ((USBH_T *) USBH_BASE)

Definition at line 388 of file M480.h.

◆ USPI0

#define USPI0   ((USPI_T *) USCI0_BASE)

USPI0 Configuration Struct

Definition at line 451 of file M480.h.

◆ USPI1

#define USPI1   ((USPI_T *) USCI1_BASE)

USPI1 Configuration Struct

Definition at line 452 of file M480.h.

◆ UUART0

#define UUART0   ((UUART_T *) USCI0_BASE)

UUART0 Configuration Struct

Definition at line 456 of file M480.h.

◆ UUART1

#define UUART1   ((UUART_T *) USCI1_BASE)

UUART1 Configuration Struct

Definition at line 457 of file M480.h.

◆ WDT

#define WDT   ((WDT_T *) WDT_BASE)

Definition at line 398 of file M480.h.

◆ WWDT

#define WWDT   ((WWDT_T *) WWDT_BASE)

Definition at line 399 of file M480.h.